Hardware virtualization on a coarse-grained reconfigurable processor
C. Plessl, Hardware Virtualization on a Coarse-Grained Reconfigurable Processor, Shaker Verlag, Aachen, Germany, 2006.
LibreCat: /record/2404
DOI: 10.2370/9783832255619

Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Virtualization of Hardware – Introduction and Survey
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
LibreCat: /record/2415

TKDM – A Reconfigurable Co-processor in a PC's Memory Slot
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–259.
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

The Case for Reconfigurable Hardware in Wearable Computing
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, G. Tröster, Personal and Ubiquitous Computing 7 (2003) 299–308.
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x

Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, Journal of Supercomputing 26 (2003) 109–129.
LibreCat: /record/2420
DOI: 10.1023/a:1024443416592

Virtualizing Hardware with Multi-Context Reconfigurable Arrays
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2003, pp. 151–160.
LibreCat: /record/2421
DOI: 10.1007/b12007

Co-simulation of a Hybrid Multi-Context Architecture
R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–180.
LibreCat: /record/2422

Reconfigurable Hardware in Wearable Computing Nodes
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, L. Thiele, in: Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–222.
LibreCat: /record/2423
DOI: 10.1109/ISWC.2002.1167250

Partially Reconfigurable Cores for Xilinx Virtex
M. Dyer, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2002, pp. 292–301.
LibreCat: /record/2424
DOI: 10.1007/3-540-46117-5

Custom Computing Machines for the Set Covering Problem
C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–172.
LibreCat: /record/2425
DOI: 10.1109/FPGA.2002.1106671

Instance-Specific Accelerators for Minimum Covering
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat: /record/2428

Server-Side-Techniken im Web – ein Überblick
C. Plessl, E. Wilde, IX (2001) 88–93.
LibreCat: /record/2429

Reconfigurable Accelerators for Minimum Covering
C. Plessl, Reconfigurable Accelerators for Minimum Covering, Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2001.
LibreCat: /record/2430

Reconfigurable Processors for Handhelds and Wearables: Application Analysis
R. Enzler, M. Platzner, C. Plessl, L. Thiele, G. Tröster, in: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, pp. 135–146.
LibreCat: /record/2432
DOI: 10.1117/12.434376

Hardware/Software Codesign in Speech Compression Applications
C. Plessl, S. Maurer, Hardware/Software Codesign in Speech Compression Applications, Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2000.
LibreCat: /record/2433