F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based System Simulation,” Greece, Sep. 2014, IEEE, 2014.
LibreCat: /record/25120

M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Source code annotated memory leak detection for soft real time embedded systems with resource constraints,” 2014.
LibreCat: /record/25146

F. Mischkalla and W. Müller, “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation,” 2014.
LibreCat: /record/25144

M. Becker, C. Kuznik, and W. Müller, “Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems,”10.1109/ICCPS.2014.6843726__presented at the ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin, 2014, doi:10.1109/ICCPS.2014.6843726 .
LibreCat: /record/36918
DOI: 10.1109/ICCPS.2014.6843726

C. Kuznik, W. Müller, and G. B. Defo, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” presented at the Proceedings of the Electronic System Level Synthesis Conference (ESLSyn), 2014.
LibreCat: /record/36917

C. Kuznik and W. Müller, “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM,” 2014.
LibreCat: /record/25166

C. Kuznik, B. G. Defo, and W. Müller, “Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung,” 2014.
LibreCat: /record/25163

C. Kuznik, B. G. Defo, and W. Müller, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” Electronic System Level Synthesis Conference (ESLSyn), 2014.
LibreCat: /record/25151

A. Awny, L. Möller, J. Junio, C. Scheytt, and A. Thiede, “Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer,”10.1109/JSSC.2013.2285385__IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. Vol.49, no. No.2, pp. 452–470, 2014, doi:10.1109/JSSC.2013.2285385 .
LibreCat: /record/24310
DOI: 10.1109/JSSC.2013.2285385

B. Koppelmann, B. Messidat, M. Becker, W. Müller, and J. C. Scheytt, “Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” 2014.
LibreCat: /record/34585

B. Laemmle et al., “A fully integrated 120-GHz six-port receiver front-end in a 130-nm SiGe BiCMOS technology,”10.1109/SiRF.2013.6489455__2013, doi:10.1109/SiRF.2013.6489455 .
LibreCat: /record/24356
DOI: 10.1109/SiRF.2013.6489455

J. Digel et al., “Integrator and digitizer for a non-coherent IR-UWB receiver,”10.1109/SiRF.2013.6489443__in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2013 IEEE 13th Topical Meeting on, 2013, pp. 93–95, doi:10.1109/SiRF.2013.6489443 .
LibreCat: /record/24355
DOI: 10.1109/SiRF.2013.6489443

Y. Sun et al., “A low-cost miniature 120GHz SiP FMCW/CW radar sensor with software linearization,”10.1109/ISSCC.2013.6487676__in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International, 2013, pp. 148–149, doi:10.1109/ISSCC.2013.6487676 .
LibreCat: /record/24353
DOI: 10.1109/ISSCC.2013.6487676

C. Scheytt et al., “Towards mm-wave System-On-Chip with integrated antennas for low-cost 122 and 245 GHz radar sensors,”10.1109/SiRF.2013.6489494__in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2013 IEEE 13th Topical Meeting on, 2013, pp. 246–248, doi:10.1109/SiRF.2013.6489494 .
LibreCat: /record/24357
DOI: 10.1109/SiRF.2013.6489494

A. Ergintav, Y. Sun, C. Scheytt, and Y. Gürbüz, “GHz 6-bit programmable divider in SiGe BiCMOS,”10.1109/SiRF.2013.6489451__2013, doi:10.1109/SiRF.2013.6489451 .
LibreCat: /record/24354
DOI: 10.1109/SiRF.2013.6489451

Y. Mao, K. Schmalz, J. Borngräber, and C. Scheytt, “GHz subharmonic receivers in SiGe,”10.1109/RFIC.2013.6569533__2013, doi:10.1109/RFIC.2013.6569533 .
LibreCat: /record/24361
DOI: 10.1109/RFIC.2013.6569533

M. Elkhouly, Y. Mao, C. Meliani, F. Ellinger, and C. Scheytt, “A 240 GHz Direct Conversion IQ Receiver in 0.13 µm SiGe BiCMOS technology,”10.1109/RFIC.2013.6569589__2013, doi:10.1109/RFIC.2013.6569589 .
LibreCat: /record/24358
DOI: 10.1109/RFIC.2013.6569589

Y. Mao, K. Schmalz, J. Borngräber, C. Scheytt, and C. Meliani, “GHz Subharmonic Receiver in SiGe,”10.1109/MWSYM.2013.6697429__2013, doi:10.1109/MWSYM.2013.6697429 .
LibreCat: /record/24362
DOI: 10.1109/MWSYM.2013.6697429

C. Scheytt, “Wireless 100Gb/s Using A Powerand,” 2013.
LibreCat: /record/24360

C. Scheytt, Hardware-Effizientes Mixed-Signal Entzerrfilter. 2013.
LibreCat: /record/24359