Wiersema, T. (2021). Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University.
LibreCat: /record/26746

Lienen, C., &; Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems, 1–20.https://doi.org/10.1145/3494571 
LibreCat: /record/29150
DOI: 10.1145/3494571

Kashikar, C. (2021). A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University.
LibreCat: /record/29151

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM.https://doi.org/10.1145/3453688.3461506 
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

Rehnen, J. W. (2021). Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.
LibreCat: /record/22216

Awais, M., &; Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.
LibreCat: /record/22309

Brede, M. (2021). Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University.
LibreCat: /record/22483

Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., &; Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, &; D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science.https://doi.org/10.1007/978-3-030-79025-7_4 
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Boschmann, A., Neuhaus, D., Vogt, S., Kaltschmidt, C., Platzner, M., &; Dosen, S. (2021). Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation, 18(1), Article 25.https://doi.org/10.1186/s12984-021-00822-6 
LibreCat: /record/30906
DOI: 10.1186/s12984-021-00822-6

Rodriguez, A., Otero, A., Platzner, M., &; De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1.https://doi.org/10.1109/tc.2021.3107196 
LibreCat: /record/30907
DOI: 10.1109/tc.2021.3107196

Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online.https://doi.org/10.1145/3468044.3468055 
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055

Sheikh, M. A. (2021). Design and Implementation of a ReconROS-based Obstacle Avoidance System. Paderborn University.
LibreCat: /record/29540

Lienen, C., &; Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. In arXiv:2107.07208.
LibreCat: /record/22764

Hansmeier, T., &; Platzner, M. (2021). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1639–1647.https://doi.org/10.1145/3449726.3463159 
LibreCat: /record/21813
DOI: 10.1145/3449726.3463159

Jakobs, M.-C., Pauck, F., Platzner, M., Wehrheim, H., &; Wiersema, T. (2021). Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access.https://doi.org/10.1109/ACCESS.2021.3131213 
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC).https://doi.org/10.1109/vlsi-soc53125.2021.9606974 
LibreCat: /record/29138
DOI: 10.1109/vlsi-soc53125.2021.9606974

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE). Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France.https://doi.org/10.23919/DATE51398.2021.9474026 
LibreCat: /record/20681
DOI: 10.23919/DATE51398.2021.9474026

Clausing, L. (2021). ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies.https://doi.org/10.1145/3468044.3468056 
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., &; Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases.https://doi.org/10.1007/978-3-030-93736-2_27 
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27