Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.
LibreCat: /record/168

Wiersema, T., Wu, S., &; Platzner, M. (2015). On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach. In Proceedings of the International Symposium in Reconfigurable Computing (ARC) (pp. 365--372).https://doi.org/10.1007/978-3-319-16214-0_32 
LibreCat: /record/269
DOI: 10.1007/978-3-319-16214-0_32

Knorr, C. (2015). Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn.
LibreCat: /record/3364

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205 
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Ahmed, A. F. (2015). Self-Optimizing Organic Cache. Paderborn University.
LibreCat: /record/10615

Beisel, T. (2015). Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10624

Hangmann, H. (2015). Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University.
LibreCat: /record/10668

Haupt, C. (2015). Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University.
LibreCat: /record/10671

Ho, N., Ahmed, A. F., Kaufmann, P., &; Platzner, M. (2015). Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. In Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS) (pp. 1–7).https://doi.org/10.1109/AHS.2015.7231178 
LibreCat: /record/10673
DOI: 10.1109/AHS.2015.7231178

Kaufmann, P., &; Shen, C. (2015). Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing. In Genetic and Evolutionary Computation (GECCO) (pp. 409–416). ACM.
LibreCat: /record/10693

Meisner, S., &; Platzner, M. (2015). Comparison of thread signatures for error detection in hybrid multi-cores. In Field Programmable Technology (FPT), 2015 International Conference on (pp. 212–215).https://doi.org/10.1109/FPT.2015.7393153 
LibreCat: /record/10711
DOI: 10.1109/FPT.2015.7393153

Meißner, R. (2015). Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn.
LibreCat: /record/10714

Posewsky, T. (2015). Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University.
LibreCat: /record/10726

M. Mora, A., Squillero, G., Agapitos, A., Burelli, P., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2015). Applications of Evolutionary Computation - 18th European Conference, EvoApplications (Vol. 9028). Copenhagen, Denmark: Springer.
LibreCat: /record/10757

H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O.,https://doi.org/10.1109/FPL.2015.7293747__Wang, Y. (2015). Significant papers from the first 25 years of the FPL conference. In Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL) (pp. 1–3). Imperial College.https://doi.org/10.1109/FPL.2015.7293747 
LibreCat: /record/10765
DOI: 10.1109/FPL.2015.7293747

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2015). New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software. In Proceedings of the 29th European Simulation and Modelling Conference (ESM).
LibreCat: /record/10767

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2015). From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires. IEEE Transactions on Nanotechnology, 14(6), 1117–1126.https://doi.org/10.1109/TNANO.2015.2482359 
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Zhang, J., De Micheli, G., Sanchez, E., &; Reorda, M. S. (2015). On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors. In 2015 IEEE Computer Society Annual Symposium on VLSI (pp. 491–496). IEEE.https://doi.org/10.1109/ISVLSI.2015.13 
LibreCat: /record/10771
DOI: 10.1109/ISVLSI.2015.13

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2015). Fault modeling in controllable polarity silicon nanowire circuits. In Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition (pp. 453–458). EDA Consortium.https://doi.org/10.7873/DATE.2015.0428 
LibreCat: /record/10772
DOI: 10.7873/DATE.2015.0428

Guettatfi, Z., Kermia, O., &; Khouas, A. (2015). Over effective hard real-time hardware tasks scheduling and allocation. In 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College.https://doi.org/10.1109/FPL.2015.7293994 
LibreCat: /record/10779
DOI: 10.1109/FPL.2015.7293994

Graf, T., &; Platzner, M. (2015). Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. In Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers (pp. 1–11). Springer International Publishing.https://doi.org/10.1007/978-3-319-27992-3_1 
LibreCat: /record/13153
DOI: 10.1007/978-3-319-27992-3_1

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 
LibreCat: /record/296
DOI: 10.1155/2015/859425

Damschen, M., &; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).
LibreCat: /record/303
arXiv: 1412.3906

Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., Francis, D., Gorini, B., Lanni, F., Lehmann-Miotto, G., Levinson, L., Narevicius, J., Plessl, C., Roich, A., Ryu, S., P. Schreuder, F., Vandelli, W., Vermeulen, J., &; Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. Proc. Int. Conf. on Distributed Event-Based Systems (DEBS).https://doi.org/10.1145/2675743.2771824 
LibreCat: /record/1773
DOI: 10.1145/2675743.2771824

Plessl, C., Platzner, M., &; Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, 5, 396–399.https://doi.org/10.1007/s00287-015-0911-z 
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

Damschen, M., Riebler, H., Vaz, G. F., &; Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 1078–1083.https://doi.org/10.7873/DATE.2015.1124 
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

Meisner, S., &; Platzner, M. (2014). Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. In D. Goehringer, M. Santambrogio, J. P. Cardoso, &; K. Bertels (Eds.), Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC) (pp. 283–290). Springer.https://doi.org/10.1007/978-3-319-05960-0_30 
LibreCat: /record/347
DOI: 10.1007/978-3-319-05960-0_30

Graf, T., Schaefers, L., &; Platzner, M. (2014). On Semeai Detection in Monte-Carlo Go. In Proc. Conf. on Computers and Games (CG) (pp. 14–25). Switzerland: Springer.https://doi.org/10.1007/978-3-319-09165-5_2 
LibreCat: /record/1782
DOI: 10.1007/978-3-319-09165-5_2

Wiersema, T., Drzevitzky, S., &; Platzner, M. (2014). Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring. In Proceedings of the International Conference on Field-Programmable Technology (FPT) (pp. 167–174).https://doi.org/10.1109/FPT.2014.7082771 
LibreCat: /record/399
DOI: 10.1109/FPT.2014.7082771

Jakobs, M.-C., Platzner, M., Wiersema, T., &; Wehrheim, H. (2014). Integrating Software and Hardware Verification. In E. Albert &; E. Sekerinski (Eds.), Proceedings of the 11th International Conference on Integrated Formal Methods (iFM) (pp. 307–322).https://doi.org/10.1007/978-3-319-10181-1_19 
LibreCat: /record/408
DOI: 10.1007/978-3-319-10181-1_19

Wiersema, T., Bockhorn, A., &; Platzner, M. (2014). Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–6).https://doi.org/10.1109/ReConFig.2014.7032514 
LibreCat: /record/433
DOI: 10.1109/ReConFig.2014.7032514

Schaefers, L., &; Platzner, M. (2014). A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games, 6(3), 361–374.https://doi.org/10.1109/TCIAIG.2014.2346997 
LibreCat: /record/10602
DOI: 10.1109/TCIAIG.2014.2346997

Giefers, H., &; Platzner, M. (2014). An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers, 63(12), 2919–2932.https://doi.org/10.1109/TC.2013.174 
LibreCat: /record/10603
DOI: 10.1109/TC.2013.174

Anwer, J., Platzner, M., &; Meisner, S. (2014). FPGA Redundancy Configurations: An Automated Design Space Exploration. In Reconfigurable Architectures Workshop (RAW).https://doi.org/10.1109/IPDPSW.2014.37 
LibreCat: /record/10621
DOI: 10.1109/IPDPSW.2014.37

Bockhorn, A. (2014). Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board. Paderborn University.
LibreCat: /record/10627

Boschmann, A., &; Platzner, M. (2014). A computer vision-based approach to high density EMG pattern recognition using structural similarity. In Proc. MyoElectric Controls Symposium (MEC).
LibreCat: /record/10632

Boschmann, A., &; Platzner, M. (2014). Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).
LibreCat: /record/10633

Brand, M. (2014). A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University.
LibreCat: /record/10640

Damschen, M. (2014). Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University.
LibreCat: /record/10645

Glette, K., &; Kaufmann, P. (2014). Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System. In IEEE Congress on Evolutionary Computation (CEC).
LibreCat: /record/10654

Hagedorn, C. (2014). Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten. Paderborn University.
LibreCat: /record/10665

Ho, N., Kaufmann, P., &; Platzner, M. (2014). A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. In 24th Intl. Conf. on Field Programmable Logic and Applications (FPL) (pp. 1–4).https://doi.org/10.1109/FPL.2014.6927437 
LibreCat: /record/10674
DOI: 10.1109/FPL.2014.6927437

Ho, N., Kaufmann, P., &; Platzner, M. (2014). Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In 2014 IEEE Intl. Conf. on Evolvable Systems (ICES) (pp. 31–37).https://doi.org/10.1109/ICES.2014.7008719 
LibreCat: /record/10677
DOI: 10.1109/ICES.2014.7008719

König, F. (2014). EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese. Paderborn University.
LibreCat: /record/10679

Koch, B. (2014). Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
LibreCat: /record/10701

Mittendorf, R. (2014). Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University.
LibreCat: /record/10715

Rüthing, C. (2014). The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University.
LibreCat: /record/10732

Schäfers, L. (2014). Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10733

Shen, C., Kaufmann, P., &; Braun, M. (2014). Optimizing the Generator Start-up Sequence After a Power System Blackout. In IEEE Power and Energy Society General Meeting (IEEE GM).
LibreCat: /record/10738

Shen, C., Kaufmann, P., &; Braun, M. (2014). A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm. In Power Systems Computation Conference (PSCC). IEEE.
LibreCat: /record/10739

Surmund, S. (2014). Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
LibreCat: /record/10744

I. Esparcia-Alc\rquote azar, A., Eiben, A. E., Agapitos, A., Sim\'7eoes, A., G.B. Tettamanzi, A., Della Cioppa, A.,  S. Bush (editors), W. (2014). Applications of Evolutionary Computation - 17th European Conference, EvoApplications (Vol. 8602). Granada, Spain: Springer.
LibreCat: /record/10756

Anwer, J., &; Platzner, M. (2014). Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp. 177–184). IEEE.https://doi.org/10.1109/DFT.2014.6962108 
LibreCat: /record/10764
DOI: 10.1109/DFT.2014.6962108

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Yazdani, M., &; De Micheli, G. (2014). Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection. In 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (pp. 163–168). IEEE.https://doi.org/10.1109/NANOARCH.2014.6880479 
LibreCat: /record/10773
DOI: 10.1109/NANOARCH.2014.6880479

Graf, T., &; Platzner, M. (2014). Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go. In 2014 IEEE Conference on Computational Intelligence and Games (pp. 1–8).https://doi.org/10.1109/CIG.2014.6932863 
LibreCat: /record/13154
DOI: 10.1109/CIG.2014.6932863

Platzner, M., &; Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, &; T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Wilhelm Fink.
LibreCat: /record/335

Kenter, T., Vaz, G. F., &; Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405, 144–155.https://doi.org/10.1007/978-3-319-05960-0_13 
LibreCat: /record/388
DOI: 10.1007/978-3-319-05960-0_13

Agne, A., Hangmann, H., Happe, M., Platzner, M., &; Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919.https://doi.org/10.1016/j.micpro.2013.12.001 
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Riebler, H., Kenter, T., Plessl, C., &; Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. Proceedings of Field-Programmable Custom Computing Machines (FCCM), 222–229.https://doi.org/10.1109/FCCM.2014.67 
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2), Article 13.https://doi.org/10.1145/2617596 
LibreCat: /record/365
DOI: 10.1145/2617596

Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., &; Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71.https://doi.org/10.1109/MM.2013.110 
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., D. Santambrogio, M., &; Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), 142–149.https://doi.org/10.1109/ISPA.2014.27 
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

Vaz, G. F., Riebler, H., Kenter, T., &; Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2014.7032509 
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509

Kenter, T., Schmitz, H., &; Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2014.7032535 
LibreCat: /record/406
DOI: 10.1109/ReConFig.2014.7032535

C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., Pell, O., Plessl, C., D. Santambrogio, M., &; Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC).https://doi.org/10.1007/978-3-319-05960-0_38 
LibreCat: /record/1780
DOI: 10.1007/978-3-319-05960-0_38

Giefers, H., Plessl, C., &; Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70.https://doi.org/10.1145/2641361.2641372 
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Kaufmann, P. (2013). Adapting Hardware Systems by Means of Multi-Objective Evolution. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/11619

Kasap, S., &; Redif, S. (2013). FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm. In Proc. IEEE Signal Processing and Communications Conf. (SUI). IEEE.https://doi.org/10.1109/SIU.2013.6531530 
LibreCat: /record/1786
DOI: 10.1109/SIU.2013.6531530

Kasap, S., &; Redif, S. (2013). Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 22(3), 522–536.https://doi.org/10.1109/TVLSI.2013.2248069 
LibreCat: /record/1792
DOI: 10.1109/TVLSI.2013.2248069

Happe, M. (2013). Performance and thermal management on self-adaptive hybrid multi-cores. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/501

Happe, M., Lübbers, E., &; Platzner, M. (2013). A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. International Journal of Real-Time Image Processing, 8(1), 95–110.https://doi.org/doi:10.1007/s11554-011-0212-y 
LibreCat: /record/10604
DOI: doi:10.1007/s11554-011-0212-y

Anwer, J., Meisner, S., &; Platzner, M. (2013). Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on (pp. 1–6).https://doi.org/10.1109/ReConFig.2013.6732280 
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

Bick, C. (2013). Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner. Paderborn University.
LibreCat: /record/10626

Boschmann, A., Nofen, B., &; Platzner, M. (2013). Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).
LibreCat: /record/10634

Boschmann, A., &; Platzner, M. (2013). Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array. In Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC).
LibreCat: /record/10635

Glette, K., Kaufmann, P., Assad, C., &; Wolf, M. (2013). Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface. In IEEE Intl. Conf. on Evolvable Systems (ICES) (Vol. 1, pp. 1–1). Springer.
LibreCat: /record/10655

Kaufmann, P. (2013). Adapting Hardware Systems by Means of Multi-Objective Evolution. Berlin: Logos Verlag.
LibreCat: /record/10681

Kaufmann, P., Glette, K., Gruber, T., Platzner, M., Torresen, J., &; Sick, B. (2013). Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Transactions on Evolutionary Computation, 17(1), 46–63.https://doi.org/10.1109/TEVC.2012.2185845 
LibreCat: /record/10684
DOI: 10.1109/TEVC.2012.2185845

Knoop, M. (2013). Behavior Models for Electric Vehicles. IWES Kassel.
LibreCat: /record/10700

Nofen, B. (2013). Verbesserung der Erkennungsrate eines Systems zur Klassifikation von EMG-Signalen durch den Einsatz eines hybriden Lagesensors. Paderborn University.
LibreCat: /record/10720

Pudelko, D. (2013). Überquerung der Styx - Betriebsparametervariation und Fehlerverhalten eines Platform FPGAs. Paderborn University.
LibreCat: /record/10727

Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.
LibreCat: /record/10730

Sprenger, A. (2013). MiBenchHybridf: Erweiterung eines Benchmarks um Hardwarebeschleunigung. Paderborn University.
LibreCat: /record/10741

Steppeler, P. (2013). Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen. Paderborn University.
LibreCat: /record/10743

Toebermann, C., Geibel, D., Hau, M., Brandl, R., Kaufmann, P., Ma, C.,  Degner, T. (2013). Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation. In Real-Time Conference. OPAL RT Paris.
LibreCat: /record/10745

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Yazdani, M., &; De Micheli, G. (2013). A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) (pp. 83–88). IEEE.https://doi.org/10.1109/DFT.2013.6653587 
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

Gaillardon, P.-E., Ghasemzadeh Mohammadi, H., &; De Micheli, G. (2013). Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. In 2013 14th Latin American Test Workshop-LATW (pp. 1–6). IEEE.https://doi.org/10.1109/LATW.2013.6562673 
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

Graf, T., Schäfers, L., &; Platzner, M. (2013). On Semeai Detection in Monte-Carlo Go. In Proceedings of the International Conference on Computers and Games (CG). Springer.
LibreCat: /record/13645

Riebler, H., Kenter, T., Sorge, C., &; Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389.https://doi.org/10.1109/FPT.2013.6718394 
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

Happe, M., Kling, P., Plessl, C., Platzner, M., &; Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS).https://doi.org/10.1109/ISORC.2013.6913232 
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Suess, T., Schoenrock, A., Meisner, S., &; Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73.https://doi.org/10.1109/IPDPSW.2013.136 
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Kasap, S., &; Redif, S. (2012). FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 135–140). IEEE Computer Society.https://doi.org/10.1109/FPT.2012.6412125 
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Kasap, S., &; Redif, S. (2012). FPGA implementation of a second-order convolutive blind signal separation algorithm. In Int. Architecture and Engineering Symp. (ARCHENG).
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Wistuba, M., Schaefers, L., &; Platzner, M. (2012). Comparison of Bayesian Move Prediction Systems for Computer Go. In Proc. IEEE Conf. on Computational Intelligence and Games (CIG) (pp. 91–99). IEEE.https://doi.org/10.1109/CIG.2012.6374143 
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Thielemans, K., Tsoumpas, C., Mustafovic, S., Beisel, T., Aguiar, P., Dikaios, N., &; W Jacobson, M. (2012). STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology, 57(4), 867–883.https://doi.org/10.1088/0031-9155/57/4/867 
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Redif, S., &; Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651.https://doi.org/10.1080/00207217.2012.751343 
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Kasap, S., &; Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.
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Drzevitzky, S. (2012). Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security. Universität Paderborn.
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Plessl, C., Platzner, M., Agne, A., Happe, M., &; Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
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