Boschmann, Alexander, and Marco Platzner. “Reducing Classification Accuracy Degradation of Pattern Recognition Based Myoelectric Control Caused by Electrode Shift Using a High Density Electrode Array.” In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat: /record/10636

Dridger, Denis. Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University, 2012.
LibreCat: /record/10650

Giefers, Heiner. Design and Programming of Reconfigurable Mesh Based Many-Cores. Berlin: Logos Verlag Berlin GmbH, 2012.
LibreCat: /record/10652

Graf, Tobias. Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go. Paderborn University, 2012.
LibreCat: /record/10658

Hangmann, Hendrik. Generating Adjustable Temperature Gradients on Modern FPGAs. Paderborn University, 2012.
LibreCat: /record/10667

Kaufmann, Paul, Kyrre Glette, Marco Platzner, and Jim Torresen. “Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.”https://doi.org/10.4018/jaras.2012100102__International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3, no. 4 (2012): 17–31.https://doi.org/10.4018/jaras.2012100102 .
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

Platzner, Marco, Alexander Boschmann, and Paul Kaufmann. Wieder Natürlich Gehen Und Greifen, 2012.
LibreCat: /record/10723

Schmitz, Henning. Stereo Matching on a HC-1 Hybrid Core Computer. Paderborn University, 2012.
LibreCat: /record/10734

Topmöller, Christoph. Entwicklung Eines Picoblaze Compilers Mit Dem Gentle Compiler Construction System. Paderborn University, 2012.
LibreCat: /record/10747

Wistuba, Martin. Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University, 2012.
LibreCat: /record/10754

Lewis, Peter, Marco Platzner, and Xin Yao. An Outlook for Self-Awareness in Computing Systems. Awareness Magazine, 2012.
LibreCat: /record/13462

Meyer, Björn, Jörn Schumacher, Christian Plessl, and Jens Förstner. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?”https://doi.org/10.1109/FPL.2012.6339370__In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–96. IEEE, 2012.https://doi.org/10.1109/FPL.2012.6339370 .
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.”https://doi.org/10.1016/j.micpro.2011.04.002__Microprocessors and Microsystems 36, no. 2 (2012): 110–26.https://doi.org/10.1016/j.micpro.2011.04.002 .
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Happe, Markus, Hendrik Hangmann, Andreas Agne, and Christian Plessl. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.”https://doi.org/10.1109/ReConFig.2012.6416745__In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012.https://doi.org/10.1109/ReConFig.2012.6416745 .
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Kenter, Tobias, Christian Plessl, and Henning Schmitz. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?”https://doi.org/10.1109/ReConFig.2012.6416773__In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8. IEEE, 2012.https://doi.org/10.1109/ReConFig.2012.6416773 .
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Happe, Markus, Andreas Agne, Christian Plessl, and Marco Platzner. “Hardware/Software Platform for Self-Aware Compute Nodes.” In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9, 2012.
LibreCat: /record/609

Barrio, Pablo, Carlos Carreras, Roberto Sierra, Tobias Kenter, and Christian Plessl. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.”https://doi.org/10.1109/HPCSim.2012.6266973__In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–65. IEEE, 2012.https://doi.org/10.1109/HPCSim.2012.6266973 .
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Rüthing, Christoph, Markus Happe, Andreas Agne, and Christian Plessl. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.”https://doi.org/10.1109/FPL.2012.6339370__In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–62. IEEE, 2012.https://doi.org/10.1109/FPL.2012.6339370 .
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” In Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat: /record/2180

Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.”https://doi.org/10.1155/2012/418315__Int. Journal of Reconfigurable Computing (IJRC), 2012.https://doi.org/10.1155/2012/418315 .
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Kenter, Tobias, Christian Plessl, Marco Platzner, and Michael Kauschke. “Estimation and Partitioning for CPU-Accelerator Architectures.” In Intel European Research and Innovation Conference, 2011.
LibreCat: /record/2191

Plessl, Christian, and Marco Platzner. “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors.”https://doi.org/10.4018/978-1-60960-086-0__In Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, edited by Mohamed Khalgui and Hans-Michael Hanisch. Hershey, PA, USA: IGI Global, 2011.https://doi.org/10.4018/978-1-60960-086-0 .
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Graf, Tobias, Ulf Lorenz, Marco Platzner, and Lars Schaefers. “Parallel Monte-Carlo Tree Search for HPC Systems.”https://doi.org/10.1007/978-3-642-23397-5_36__In Proc. European Conf. on Parallel Processing (Euro-Par), Vol. 6853. Lecture Notes in Computer Science (LNCS). Berlin / Heidelberg: Springer, 2011.https://doi.org/10.1007/978-3-642-23397-5_36 .
LibreCat: /record/2204
DOI: 10.1007/978-3-642-23397-5_36

Drzevitzky, Stephanie, and Marco Platzner. “Achieving Hardware Security for Reconû01gurable Systems on Chip by a Proof-Carrying Code Approach.”https://doi.org/10.1109/ReCoSoC.2011.5981499__In Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 58–65, 2011.https://doi.org/10.1109/ReCoSoC.2011.5981499 .
LibreCat: /record/666
DOI: 10.1109/ReCoSoC.2011.5981499

Boschmann, Alexander, Paul Kaufmann, and Marco Platzner. “Accurate Gait Phase Detection Using Surface Electromyographic Signals and Support Vector Machines.” In Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
LibreCat: /record/10637

Boschmann, Alexander, Marco Platzner, Michael Robrecht, Martin Hahn, and Michael Winkler. “Development of a Pattern Recognition-Based Myoelectric Transhumeral Prosthesis with Multifunctional Simultaneous Control Using a Model-Driven Ppproach for Mechatronic Systems.” In Proc. MyoElectric Controls Symposium (MEC), 2011.
LibreCat: /record/10638

Ikonomakis, Nikolaos. PinSim: Schnelle Simulation Mit Pintools. Paderborn University, 2011.
LibreCat: /record/10678

Kassner, Hendrik. MPI-CUDA Codegenerierung Für Nanophoton Simulationen Auf Clustern. Paderborn University, 2011.
LibreCat: /record/10680

Kaufmann, Paul, and Marco Platzner. “Multi-Objective Intrinsic Evolution of Embedded Systems.” In Organic Computing---A Paradigm Shift for Complex Systems, edited by Christian Müller-Schloer, Hartmut Schmeck, and Theo Ungerer, 1:193–206. Autonomic Systems. Springer Basel, 2011.
LibreCat: /record/10687

Schwabe, Arne. Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University, 2011.
LibreCat: /record/10736

Sekanina, Lukas, James Alfred Walker, Paul Kaufmann, Christian Plessl, and Marco Platzner. “Evolution of Electronic Circuits.” In Cartesian Genetic Programming, 125–79. Natural Computing Series. Springer Berlin Heidelberg, 2011.
LibreCat: /record/10737

Walker, James Alfred, Julian F. Miller, Paul Kaufmann, and Marco Platzner. “Problem Decomposition in Cartesian Genetic Programming.” In Cartesian Genetic Programming, 35–99. Natural Computing Series. Springer Berlin Heidelberg, 2011.
LibreCat: /record/10748

Welp, Daniel. User Space Scheduling for Heterogeneous Systems. Paderborn University, 2011.
LibreCat: /record/10750

Agne, Andreas, Marco Platzner, and Enno Lübbers. “Memory Virtualization for Multithreaded Reconfigurable Hardware.”https://doi.org/10.1109/fpl.2011.42__In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 185–88. IEEE, 2011.https://doi.org/10.1109/fpl.2011.42 .
LibreCat: /record/13643
DOI: 10.1109/fpl.2011.42

Henkel, Jörg, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, et al. “Design and Architectures for Dependable Embedded Systems.”https://doi.org/10.1145/2039370.2039384__In Proceedings of the Seventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis - CODES+ISSS ’11, 2011.https://doi.org/10.1145/2039370.2039384 .
LibreCat: /record/13644
DOI: 10.1145/2039370.2039384

Meyer, Björn, Christian Plessl, and Jens Förstner. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.”https://doi.org/10.1109/SAAHPC.2011.12__In Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. IEEE Computer Society, 2011.https://doi.org/10.1109/SAAHPC.2011.12 .
LibreCat: /record/2194
DOI: 10.1109/SAAHPC.2011.12

Beisel, Tobias, Tobias Wiersema, Christian Plessl, and André Brinkmann. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.”https://doi.org/10.1109/ASAP.2011.6043273__In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–26. IEEE Computer Society, 2011.https://doi.org/10.1109/ASAP.2011.6043273 .
LibreCat: /record/2193
DOI: 10.1109/ASAP.2011.6043273

Happe, Markus, Andreas Agne, and Christian Plessl. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.”https://doi.org/10.1109/ReConFig.2011.59__In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. IEEE, 2011.https://doi.org/10.1109/ReConFig.2011.59 .
LibreCat: /record/656
DOI: 10.1109/ReConFig.2011.59

Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.”https://doi.org/10.1145/1950413.1950448__In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–80. New York, NY, USA: ACM, 2011.https://doi.org/10.1145/1950413.1950448 .
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.”https://doi.org/10.1155/2011/760954__Int. Journal of Recon- Figurable Computing (IJRC), 2011.https://doi.org/10.1155/2011/760954 .
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.”https://doi.org/10.1109/IPDPS.2011.153__In Proc. Reconfigurable Architectures Workshop (RAW), 278–85. IEEE Computer Society, 2011.https://doi.org/10.1109/IPDPS.2011.153 .
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Drzevitzky, Stephanie, Uwe Kastens, and Marco Platzner. “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification.”https://doi.org/10.1155/2010/180242__International Journal of Reconfigurable Computing 2010 (2010).https://doi.org/10.1155/2010/180242 .
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Agne, Andreas. Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University, 2010.
LibreCat: /record/10614

Boschmann, Alexander. EMG-Basierte Ganganalyse. Paderborn University, 2010.
LibreCat: /record/10629

Breitlauch, Daniel. Evolvable Cache Controller. Paderborn University, 2010.
LibreCat: /record/10642

Dridger, Denis. Soft Microprocessors with Tightly Coupled Application-Specific Coprocessors. Paderborn University, 2010.
LibreCat: /record/10649

Graf, Tobias. Parallelization of the UCT Algorithm on HPC-Clusters. Paderborn University, 2010.
LibreCat: /record/10657

Kaufmann, Paul, Kevin Englehart, and Marco Platzner. “Fluctuating EMG Signals: Investigating Long-Term Effects of Pattern Matching Algorithms.” In International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 6357–60. IEEE, 2010.
LibreCat: /record/10683

Kaufmann, Paul, Tobias Knieper, and Marco Platzner. “A Novel Hybrid Evolutionary Strategy and Its Periodization with Multi-Objective Genetic Optimizers.” In IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), 541–48. IEEE, 2010.
LibreCat: /record/10686

Kebschull, Udo, Marco Platzner, and Jürgen Teich. “Selected Papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (Editorial).”https://doi.org/10.1049/iet-cdt.2010.9044__IET Computers Digital Techniques 4, no. 3 (2010): 157–58.https://doi.org/10.1049/iet-cdt.2010.9044 .
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

Knieper, Tobias. Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University, 2010.
LibreCat: /record/10697

Knieper, Tobias, Paul Kaufmann, Kyrre Glette, Marco Platzner, and Jim Torresen. “Coping with Resource Fluctuations: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.” In IEEE Intl. Conf. on Evolvable Systems (ICES), 6274:250–61. LNCS. Springer, 2010.
LibreCat: /record/10699

Lübbers, Enno, and Marco Platzner. “ReconOS: An Operating System for Dynamically Reconfigurable Hardware.”https://doi.org/10.1007/978-90-481-3485-4_13__In Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, edited by Marco Platzner, Jürgen Teich, and Norbert Wehn, 269–90. Springer-Verlag GmbH, 2010.https://doi.org/10.1007/978-90-481-3485-4_13 .
LibreCat: /record/10704
DOI: 10.1007/978-90-481-3485-4_13

Meiche, Robert. FPGA/CPU Multicore-Plattform Für ReconOS/ECos. Paderborn University, 2010.
LibreCat: /record/10710

Niekamp, Manuel. Transparente Hardwarebeschleunigung Durch Shared Library Interposing. Paderborn University, 2010.
LibreCat: /record/10717

Runde, Bodo. A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University, 2010.
LibreCat: /record/10731

Wiersema, Tobias. Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University, 2010.
LibreCat: /record/10752

Platzner, Marco, Jürgen Teich, and Norbert Wehn, eds. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH, 2010.https://doi.org/10.1007/978-90-481-3485-4 .
LibreCat: /record/10763
DOI: 10.1007/978-90-481-3485-4

Khatir, Mehrdad, Hassan Ghasemzadeh Mohammadi, and Alireza Ejlali. “Sub-Threshold Charge Recovery Circuits.”https://doi.org/10.1109/ICCD.2010.5647815__In Computer Design (ICCD), 2010 IEEE International Conference On, 138–44. IEEE, 2010.https://doi.org/10.1109/ICCD.2010.5647815 .
LibreCat: /record/10776
DOI: 10.1109/ICCD.2010.5647815

Giefers, Heiner, and Marco Platzner. “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.” In Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2010.
LibreCat: /record/13640

Schäfer, Wilhelm, Mauro Birattari, Johannes Blömer, Marco Dorigo, Gregor Engels, Rehan O’Grady, Marco Platzner, Franz-Josef Rammig, Wolfgang  Reif, and Ansgar Trächtler. “Engineering Self-Coordinating Software Intensive Systems.” In Proceedings of the Foundations of Software Engineering (FSE) and NITR &; D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 321–24, 2010.
LibreCat: /record/13641

Giefers, Heiner, and Marco Platzner. “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.” In Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat: /record/13642

Lübbers, Enno, Marco Platzner, Christian Plessl, Ariane Keller, and Bernhard Plattner. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–31. CSREA Press, 2010.
LibreCat: /record/2223

Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.”https://doi.org/10.1109/ReConFig.2010.19__In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. Los Alamitos, CA, USA: IEEE Computer Society, 2010.https://doi.org/10.1109/ReConFig.2010.19 .
LibreCat: /record/2216
DOI: 10.1109/ReConFig.2010.19

Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–50. CSREA Press, 2010.
LibreCat: /record/2224

Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165. CSREA Press, 2010.
LibreCat: /record/2220

Plaks, Toomas P., David Andrews, Ronald DeMara, Herman Lam, Jooheung Lee, Christian Plessl, and Greg Stitt, eds. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat: /record/2222

Beisel, Tobias, Manuel Niekamp, and Christian Plessl. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.”https://doi.org/10.1109/ASAP.2010.5540798__In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. IEEE Computer Society, 2010.https://doi.org/10.1109/ASAP.2010.5540798 .
LibreCat: /record/2226
DOI: 10.1109/ASAP.2010.5540798

Keller, Ariane, Bernhard Plattner, Enno Lübbers, Marco Platzner, and Christian Plessl. “Reconfigurable Nodes for Future Networks.”https://doi.org/10.1109/GLOCOMW.2010.5700341__In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–76. IEEE, 2010.https://doi.org/10.1109/GLOCOMW.2010.5700341 .
LibreCat: /record/2206
DOI: 10.1109/GLOCOMW.2010.5700341

Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” In Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
LibreCat: /record/2228

Boschmann, Alexander, Paul Kaufmann, Marco Platzner, and Michael Winkler. “Towards Multi-Movement Hand Prostheses: Combining Adaptive Classification with High Precision Sockets.” In Proc. Technically Assisted Rehabilitation (TAR), 2009.
LibreCat: /record/10639

Kostin, Alexander. Evolvable Robot Controller. Paderborn University, 2009.
LibreCat: /record/10702

Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.”https://doi.org/10.1145/1596532.1596540__ACM Transactions on Embedded Computing Systems 9, no. 1 (2009): 8:1-8:33.https://doi.org/10.1145/1596532.1596540 .
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Tofall, Martin. Compiler for a Custom Instruction Set CPU. Paderborn University, 2009.
LibreCat: /record/10746

Warkentin, Alexander. Coarse-Grained CGP Model Using Xilinx Virte DSE Functional Units. Paderborn University, 2009.
LibreCat: /record/10749

Wildenhain, Benedikt. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009.
LibreCat: /record/10753

Ghasemzadeh Mohammadi, Hassan, Seyed Ghassem Miremadi, and Alireza Ejlali. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.”https://doi.org/10.1109/PRDC.2009.69__In Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, 252–55. IEEE, 2009.https://doi.org/10.1109/PRDC.2009.69 .
LibreCat: /record/10777
DOI: 10.1109/PRDC.2009.69

Happe, Markus, Enno Lübbers, and Marco Platzner. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). Springer, 2009.
LibreCat: /record/13632

Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” In Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
LibreCat: /record/13634

Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” In Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium. IEEE, 2009.
LibreCat: /record/13635

Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE, 2009.
LibreCat: /record/13636

Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” In Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) . IEEE, 2009.
LibreCat: /record/13637

Happe, Markus, Enno Lübbers, and Marco Platzner. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.”https://doi.org/10.1109/fpt.2009.5377645__In Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT). IEEE, 2009.https://doi.org/10.1109/fpt.2009.5377645 .
LibreCat: /record/13638
DOI: 10.1109/fpt.2009.5377645

Drzevitzky, Stephanie, Uwe Kastens, and Marco Platzner. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, 2009.
LibreCat: /record/13639

Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.”https://doi.org/10.1109/FCCM.2009.25__In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 275–78. IEEE Computer Society, 2009.https://doi.org/10.1109/FCCM.2009.25 .
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009.
LibreCat: /record/2262

Schumacher, Tobias, Tim Süß, Christian Plessl, and Marco Platzner. “Communication Performance Characterization for Reconfigurable Accelerator Design on the .”https://doi.org/10.1109/ReConFig.2009.32__In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 119–24. Los Alamitos, CA, USA: IEEE Computer Society, 2009.https://doi.org/10.1109/ReConFig.2009.32 .
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

Schumacher, Tobias, Christian Plessl, and Marco Platzner. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 338–44. IEEE, 2009.
LibreCat: /record/2261

Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 319–22. USA: CSREA Press, 2009.
LibreCat: /record/2263

Beisel, Tobias, Stefan Lietsch, and Kris Thielemans. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.”https://doi.org/10.1109/NSSMIC.2008.4774198__In IEEE Nuclear Science Symposium Conference Record (NSS), 4161–68. IEEE, 2008.https://doi.org/10.1109/NSSMIC.2008.4774198 .
LibreCat: /record/2358
DOI: 10.1109/NSSMIC.2008.4774198

Platzner, Marco, Sven Döhre, Markus Happe, Tobias Kenter, Ulf Lorenz, Tobias Schumacher, Andre Send, and Alexander Warkentin. “The GOmputer: Accelerating GO with FPGAs.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–51. CSREA Press, 2008.
LibreCat: /record/2365

Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassiû01kation von EMG-Signalen. Paderborn University, 2008.
LibreCat: /record/10628

Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008.
LibreCat: /record/10641

Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008.
LibreCat: /record/10644

Glette, Kyrre, Thiemo Gruber, Paul Kaufmann, Jim Torresen, Bernhard Sick, and Marco Platzner. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” In IEEE Adaptive Hardware and Systems (AHS), 32–39. IEEE, 2008.
LibreCat: /record/10653

Glette, Kyrre, Jim Torresen, Paul Kaufmann, and Marco Platzner. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” In IEEE Intl. Conf. on Evolvable Systems (ICES), 5216:22–33. LNCS. Springer, 2008.
LibreCat: /record/10656

Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
LibreCat: /record/10669

Torresen, Jim, Kyrre Glette, Marco Platzner, and Paul Kaufmann. “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS),” 2008.
LibreCat: /record/10690

Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” In Genetic and Evolutionary Computation (GECCO), 1219–26. ACM Press, 2008.
LibreCat: /record/10691

Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008.
LibreCat: /record/10696