Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.”https://doi.org/10.1109/FPT.2003.1275755__In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 252–59. IEEE Computer Society, 2003.https://doi.org/10.1109/FPT.2003.1275755 .
LibreCat: /record/2418
DOI: 10.1109/FPT.2003.1275755

Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, and Gerhard Tröster. “The Case for Reconfigurable Hardware in Wearable Computing.”https://doi.org/10.1007/s00779-003-0243-x__Personal and Ubiquitous Computing 7, no. 5 (2003): 299–308.https://doi.org/10.1007/s00779-003-0243-x .
LibreCat: /record/2419
DOI: 10.1007/s00779-003-0243-x

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.”https://doi.org/10.1023/a:1024443416592__Journal of Supercomputing 26, no. 2 (2003): 109–29.https://doi.org/10.1023/a:1024443416592 .
LibreCat: /record/2420
DOI: 10.1023/a:1024443416592

Enzler, Rolf, Christian Plessl, and Marco Platzner. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.”https://doi.org/10.1007/b12007__In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2778:151–60. Lecture Notes in Computer Science (LNCS). Springer, 2003.https://doi.org/10.1007/b12007 .
LibreCat: /record/2421
DOI: 10.1007/b12007

Enzler, Rolf, Christian Plessl, and Marco Platzner. “Co-Simulation of a Hybrid Multi-Context Architecture.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 174–80. CSREA Press, 2003.
LibreCat: /record/2422

Walder, Herbert, and Marco Platzner. “Online Scheduling for Block-Partitioned Reconfigurable Devices.”https://doi.org/10.1109/date.2003.1253622__In Proceedings Design, Automation and Test in Europe Conference (DATE), 290–95. IEEE CS Press, 2003.https://doi.org/10.1109/date.2003.1253622 .
LibreCat: /record/13612
DOI: 10.1109/date.2003.1253622

Walder, Herbert, Christoph Steiger, and Marco Platzner. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.”https://doi.org/10.1109/ipdps.2003.1213329__In Proceedings International Parallel and Distributed Processing Symposium. IEEE CS Press, 2003.https://doi.org/10.1109/ipdps.2003.1213329 .
LibreCat: /record/13613
DOI: 10.1109/ipdps.2003.1213329

Walder, Herbert, and Marco Platzner. “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.” In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 284–87. CSREA Press, 2003.
LibreCat: /record/13614

Steiger, Christoph, Herbert Walder, and Marco Platzner. “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices.”https://doi.org/10.1007/978-3-540-45234-8_56__In Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 575–84. Berlin, Heidelberg: Springer, 2003.https://doi.org/10.1007/978-3-540-45234-8_56 .
LibreCat: /record/13615
DOI: 10.1007/978-3-540-45234-8_56

Steiger, Christoph, Herbert Walder, Marco Platzner, and Lothar Thiele. “Online Scheduling and Placement of Real-Time Tasks to Partially Reconfigurable Devices.”https://doi.org/10.1109/real.2003.1253269__In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 252–235. IEEE CS Press, 2003.https://doi.org/10.1109/real.2003.1253269 .
LibreCat: /record/13617
DOI: 10.1109/real.2003.1253269

Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, and Lothar Thiele. “Reconfigurable Hardware in Wearable Computing Nodes.”https://doi.org/10.1109/ISWC.2002.1167250__In Proc. Int. Symp. on Wearable Computers (ISWC), 215–22. IEEE Computer Society, 2002.https://doi.org/10.1109/ISWC.2002.1167250 .
LibreCat: /record/2423
DOI: 10.1109/ISWC.2002.1167250

Dyer, Matthias, Christian Plessl, and Marco Platzner. “Partially Reconfigurable Cores for Xilinx Virtex.”https://doi.org/10.1007/3-540-46117-5__In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2438:292–301. Lecture Notes in Computer Science (LNCS). Springer, 2002.https://doi.org/10.1007/3-540-46117-5 .
LibreCat: /record/2424
DOI: 10.1007/3-540-46117-5

Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.”https://doi.org/10.1109/FPGA.2002.1106671__In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 163–72. IEEE Computer Society, 2002.https://doi.org/10.1109/FPGA.2002.1106671 .
LibreCat: /record/2425
DOI: 10.1109/FPGA.2002.1106671

Eisenring, Michael, and Marco Platzner. “A Framework for Run-Time Reconfigurable Systems.”https://doi.org/10.1023/a:1013627403946__The Journal of Supercomputing 21, no. 2 (2002): 145–59.https://doi.org/10.1023/a:1013627403946 .
LibreCat: /record/10651
DOI: 10.1023/a:1013627403946

Walder, Herbert, and Marco Platzner. “Non-Preemptive Multitasking on FPGAs: Task Placement and Footprint Transform.” In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 24–30. CSREA Press, 2002.
LibreCat: /record/13611

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 85–91. CSREA Press, 2001.
LibreCat: /record/2428

Enzler, Rolf, Marco Platzner, Christian Plessl, Lothar Thiele, and Gerhard Tröster. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.”https://doi.org/10.1117/12.434376__In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 4525:135–46. Proc. SPIE, 2001.https://doi.org/10.1117/12.434376 .
LibreCat: /record/2432
DOI: 10.1117/12.434376

Mencer, Oskar, Marco Platzner, Martin Morf, and Michael J. Flynn. “Object-Oriented Domain Specific Compilers for Programming FPGAs.”https://doi.org/10.1109/92.920835__IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9, no. 1 (2001): 205–10.https://doi.org/10.1109/92.920835 .
LibreCat: /record/10713
DOI: 10.1109/92.920835

Enzler, Rolf, and Marco Platzner. Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat: /record/13463

Platzner, Marco. “Reconfigurable Accelerators for Combinatorial Problems.”https://doi.org/10.1109/2.839322__Computer 33, no. 4 (2000): 58–60.https://doi.org/10.1109/2.839322 .
LibreCat: /record/6507
DOI: 10.1109/2.839322

Eisenring, Michael, and Marco Platzner. “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems.”https://doi.org/10.1049/ip-cdt:20000496__IEE Proceedings -- Computers &; Digital Techniques 147 (2000): 159–65.https://doi.org/10.1049/ip-cdt:20000496 .
LibreCat: /record/10606
DOI: 10.1049/ip-cdt:20000496

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.”https://doi.org/10.1109/5254.850829__IEEE Intelligent Systems 15, no. 2 (2000): 62–68.https://doi.org/10.1109/5254.850829 .
LibreCat: /record/10725
DOI: 10.1109/5254.850829

Eisenring, Michael H., and Marco Platzner. “An Implementation Framework for Run-Time Reconfigurable Systems.” In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 151–57. CSREA Press, 2000.
LibreCat: /record/13609

Eisenring, Michael, and Marco Platzner. “Optimization of Run-Time Reconfigurable Embedded Systems.” In Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 565–74. Springer, 2000.
LibreCat: /record/13610

Mencer, Oskar, and Marco Platzner. “Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.”https://doi.org/10.1109/hicss.1999.772883__In Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press, 1999.https://doi.org/10.1109/hicss.1999.772883 .
LibreCat: /record/13607
DOI: 10.1109/hicss.1999.772883

Eisenring, Michael, Marco Platzner, and Lothar Thiele. “Communication Synthesis for Reconfigurable Embedded Systems.”https://doi.org/10.1007/978-3-540-48302-1_21__In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1673:205–14. LCS. Springer, 1999.https://doi.org/10.1007/978-3-540-48302-1_21 .
LibreCat: /record/13608
DOI: 10.1007/978-3-540-48302-1_21

Platzner, Marco. “Reconfigurable Computer Architectures.” E&;i Elektrotechnik Und Informationstechnik 115 (1998): 143–48.
LibreCat: /record/10607

Platzner, Marco, and Bernhard Rinner. “Design and Implementation of a Parallel Constraint Satisfaction Algorithm.” International Journal of Computers &; Their Applications 5 (1998): 106–16.
LibreCat: /record/10608

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.
LibreCat: /record/13464

Platzner, Marco, and Giovanni De Micheli. “Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.”https://doi.org/10.1007/bfb0055234__In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 69–78. LNCS. Berlin, Heidelberg: Springer , 1998.https://doi.org/10.1007/bfb0055234 .
LibreCat: /record/13606
DOI: 10.1007/bfb0055234

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “A Computer Architecture to Support Qualitative Simulation in Industrial Applications.” E &; i Elektrotechnik Und Informationstechnik 114 (1997): 13–18.
LibreCat: /record/10609

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Parallel Qualitative Simulation.”https://doi.org/10.1016/s0928-4869(97)00008-6__Simulation Practice and Theory 5, no. 7–8 (1997): 623–38.https://doi.org/10.1016/s0928-4869(97)00008-6 .
LibreCat: /record/10724
DOI: 10.1016/s0928-4869(97)00008-6

Platzner, Marco, and Liliane Peters. “Fast Signature Segmentation on a Multi-DSP Architecture.” In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, Vol. 3166, 1997.
LibreCat: /record/13603

Röwekamp, Thomas, Marco Platzner, and Liliane  Peters. “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP.” In Proceedings of the 8th International Conference on Signal Processing Applications &; Technology (ICSPAT), 829–33, 1997.
LibreCat: /record/13604

Lind, Erich, Marco Platzner, and Bernhard  Rinner. “A Multi-DSP System with Dynamically Reconfigurable Processors.” In Proceedings of the 7th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1996.
LibreCat: /record/13602

Platzner, Marco, Bernhard Rinner, and Reinhold Weiss. “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation.” J.UCS Journal of Universal Computer Science 12 (1995): 811–20.
LibreCat: /record/10610

Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs.” In Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 311–18. IEEE CS Press, 1995.
LibreCat: /record/13469

Brenner, Eugen, Robert Ginthör-Kalcsics, Robert Hranitzky, Marco Platzner, Bernhard  Rinner, Christian  Steger, and Reinhold Weiss. “High-Performance Simulators Based on Multi-TM0.” In Proceedings of the 5th Annual Texas Instruments TM0 Educators Conference, 1995.
LibreCat: /record/13470

Friedl, Gerald, Marco Platzner, and Bernhard Rinner. “A Special-Purpose Coprocessor for Qualitative Simulation.” In Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 695–98. Springer International Publishing, 1995.
LibreCat: /record/13471

Platzner, Marco, Bernhard Rinner, and Reinhold  Weiss. “Parallel Qualitative Simulation.” In Proceedings of the EUROSIM Congress, 231–36. Elsevier, 1995.
LibreCat: /record/13472

Platzner, Marco, and Bernhard Rinner. “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture.” In Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 494–501. ISCA, 1995.
LibreCat: /record/13473

Platzner, Marco, and Bernhard Rinner. “High-Performance Qualitative Simulation on a Multi-DSP Architecture.” In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.
LibreCat: /record/13474

Hranitzky, Robert, and Marco Platzner. “Design and Implementation of Adaptive Digital Filters on a Multi-TM0 System.” In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.
LibreCat: /record/13484

Platzner, Marco, Christian Steger, and Reinhold Weiss. “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications.” In Proceedings of the 7th Mediterranean Electrotechnical Conference. IEEE Press, 1994.
LibreCat: /record/13468

Platzner, Marco, and Christian Steger. “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TM0).” Mikroelektronik, 1993.
LibreCat: /record/13466

Platzner, Marco, Christian Steger, and Reinhold  Weiss. “Performance Measurements on a Multi-DSP Architecture with TM0.” In Proceedings of the 4th International Conference on Signal Processing Applications &; Technology (ICSPAT). DSP Associates, 1993.
LibreCat: /record/13467

Ginthör, Robert, Marco Platzner, and Reinhold Weiss. “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems.” In Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 45–54, 1992.
LibreCat: /record/13465