ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip
L. Clausing, in: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2021.
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics
H. Ghasemzadeh Mohammadi, F. Jentzsch, M. Kuschel, R. Arshad, S. Rautmare, S. Manjunatha, M. Platzner, A. Boschmann, D. Schollbach, in:  Machine Learning and Principles and Practice of Knowledge Discovery in Databases, Springer, 2021.
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27

Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z.  Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
LibreCat: /record/3583

Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
LibreCat: /record/21324

Evaluation of a ReconOS-ROS Combination based on a Video Processing Application
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
LibreCat: /record/21432

Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
C.P. Gatica, M. Platzner, in: Machine Learning for Cyber Physical Systems (ML4CPS 2017), Berlin, Heidelberg, 2020.
LibreCat: /record/21584
DOI: 10.1007/978-3-662-59084-3_9

Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

Evolution of Application-Specific Cache Mappings
N. Ho, P. Kaufmann, M. Platzner, International Journal of Hybrid Intelligent Systems (2020).
LibreCat: /record/17369

Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).
LibreCat: /record/20748

ReconROS: Flexible Hardware Acceleration for RO Applications
C. Lienen, M. Platzner, B. Rinner, in: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
LibreCat: /record/20750

Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
LibreCat: /record/20820

Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
LibreCat: /record/20821

An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.
LibreCat: /record/17063
DOI: 10.1145/3377929.3398106

Dynamic Reliability Management for FPGA-Based Systems
J. Anwer, S. Meisner, M. Platzner, International Journal of Reconfigurable Computing (2020) 1–19.
LibreCat: /record/17092
DOI: 10.1155/2020/2808710

Self-aware Cyber-Physical Systems
K. Bellman, N. Dutt, L. Esterle, A. Herkersdorf, A. Jantsch, C. Landauer, P. R. Lewis, M. Platzner, N. TaheriNejad, K. Tammemäe, ACM Transactions on Cyber-Physical Systems Accepted for Publication (2020) 1–24.
LibreCat: /record/15836

A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.
LibreCat: /record/16213
DOI: 10.1145/3386263.3406952

Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 125–126.
LibreCat: /record/16363
DOI: 10.1145/3377929.3389968

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.
LibreCat: /record/20838
DOI: 10.1109/ipdpsw50202.2020.00012

Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
LibreCat: /record/21433

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020, pp. 6–16.
LibreCat: /record/35152
DOI: 10.1109/IPDPSW50202.2020.00012

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.
LibreCat: /record/3585
DOI: 10.1016/j.microrel.2019.04.003

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
LibreCat: /record/16853

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
LibreCat: /record/10577
DOI: 10.1145/3299874.3317998

Zynq-based acceleration of robust high density myoelectric signal processing
A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.
LibreCat: /record/11950
DOI: 10.1016/j.jpdc.2018.07.004

An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
T. Hansmeier, M. Platzner, M.J.H. Pantho, D. Andrews, Journal of Signal Processing Systems 91 (2019) 1259–1272.
LibreCat: /record/12967
DOI: 10.1007/s11265-018-1435-y

Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
LibreCat: /record/15422

Incremental learning with Support Vector Machine on embedded platforms
S. Kumar Jeyakumar, Incremental Learning with Support Vector Machine on Embedded Platforms, 2019.
LibreCat: /record/15883

A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat: /record/15920

FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
LibreCat: /record/14831

Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip
J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfc03gurable System-on-Chip, 2019.
LibreCat: /record/15946

Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
LibreCat: /record/14546

An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware
Z. Guettatfi, M. Platzner, O. Kermia, A. Khouas, in: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019.
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
LibreCat: /record/15874

FPGAs im Rechenzentrum
M. Platzner, C. Plessl, Informatik Spektrum (2019).
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip
J.D. Mehta, Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip, 2019.
LibreCat: /record/52478

Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

Static Scheduling Algorithms for Heterogeneous Compute Nodes
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, Universität Paderborn, 2018.
LibreCat: /record/3365

Evaluation of OpenCL-based Compilation for FPGAs
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, Universität Paderborn, 2018.
LibreCat: /record/3366

An FPGA/HMC-Based Accelerator for Resolution Proof Checking
T. Hansmeier, M. Platzner, D. Andrews, in: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2018, pp. 153–165.
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).
LibreCat: /record/3586

FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Universität Paderborn, 2018.
LibreCat: /record/3720
DOI: 10.17619/UNIPB/1-376

Making the Case for Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).
LibreCat: /record/1165

A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

An MCTS-based Framework for Synthesis of Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data
L. Clausing, Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data, Ruhr-University Bochum, 2018.
LibreCat: /record/10782

Enforcing IP Core Connection Properties with Verifiable Security Monitors
F.P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors, Universität Paderborn, 2018.
LibreCat: /record/1097

R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints
I. Ghribi, R.B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, M. Platzner, IEEE Access (2018) 14078–14092.
LibreCat: /record/12965
DOI: 10.1109/access.2018.2799852

An FPGA Accelerator for Checking Resolution Proofs
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
LibreCat: /record/3580

A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
LibreCat: /record/1157

OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
LibreCat: /record/74

Three-Stage Power System Restoration Methodology Considering Renewable Energies
C. Shen, P. Kaufmann, M. Braun, Elsevier International Journal of Electrical Power and Energy Systems (IJEPES) 94 (2017) 287–299.
LibreCat: /record/9919
DOI: 10.1016/j.ijepes.2017.07.007

reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
LibreCat: /record/65
DOI: 10.1109/ASAP.2017.7995272

Proof-Carrying Hardware via Inductive Invariants
T. Isenberg, M. Platzner, H. Wehrheim, T. Wiersema, ACM Transactions on Design Automation of Electronic Systems (2017) 61:1--61:23.
LibreCat: /record/68
DOI: 10.1145/3054743

The First 25 Years of the FPL Conference – Significant Papers
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, ACM Transactions on Reconfigurable Technology and Systems (2017).
LibreCat: /record/10600
DOI: 10.1145/2996468

Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)
R. F. DeMara, M. Platzner, M. Ottavi, IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing (2017).
LibreCat: /record/10601
DOI: 10.1109/TETC.2016.2641599

Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus
J. Anwer, M. Platzner, Microprocessors and Microsystems (2017) 160–172.
LibreCat: /record/10611
DOI: 10.1016/j.micpro.2017.06.002

An AR-based Training and Assessment System for Myoelectrical Prosthetic Control
C. Kaltschmidt, An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control, Paderborn University, 2017.
LibreCat: /record/10613

A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller
A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.
LibreCat: /record/10630
DOI: 10.23919/DATE.2017.7927137

Acceleration of Industrial Analytics Functions on a Platform FPGA
U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA, Paderborn University, 2017.
LibreCat: /record/10666

Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor
N. Ho, I.I. Ashraf, P. Kaufmann, M. Platzner, in: Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
LibreCat: /record/10672
DOI: 10.23919/DATE.2017.7927096

Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor
N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144

Three-Stage Power System Restoration Methodology Considering Renewable Energies
C. Shen, P. Kaufmann, M. Braun, Elsevier International Journal of Electrical Power and Energy Systems (IJEPES) (2017).
LibreCat: /record/10692

Reconfigurable Cryptographic Services
A. Dietrich, Reconfigurable Cryptographic Services, Paderborn University, 2017.
LibreCat: /record/10708

Fast Network Restoration by Partitioning of Parallel Black Start Zones
C. Shen, P. Kaufmann, M. Braun, The Journal of Engineering (2017) 19pp.
LibreCat: /record/10740
DOI: 10.1049/joe.2017.0032

Applications of Evolutionary Computation - 20th European Conference, EvoApplications
G. Squillero, P. Burelli, A. M. Mora, A. Agapitos, W. S. Bush, S. Cagnoni, C. Cotta, I. De Falco, A. Della Cioppa, F. Divina, A.E. Eiben, A. I. Esparcia-Alc\rquote azar, F. Fern\rquote andez de Vega, K. Glette, E. Haasdijk, J. Ignacio Hidalgo, M. Kampouridis, P. Kaufmann, M. Mavrovouniotis, T. Thanh Nguyen, R. Schaefer, K. Sim, E. Tarantino, N. Urquhart, M. Zhang (editors), Applications of Evolutionary Computation - 20th European Conference, EvoApplications, Springer, 2017.
LibreCat: /record/10759

Parametrizing Cartesian Genetic Programming: An Empirical Study
P. Kaufmann, R. Kalkreuth, in: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, Springer International Publishing, 2017.
LibreCat: /record/10760
DOI: 10.1007/978-3-319-67190-1_26

Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches
P. Kaufmann, N. Ho, M. Platzner, in: Adaptive Hardware and Systems (AHS), IEEE, 2017.
LibreCat: /record/10761
DOI: 10.1109/AHS.2017.8046380

An Empirical Study on the Parametrization of Cartesian Genetic Programming
P. Kaufmann, R. Kalkreuth, in: Genetic and Evolutionary Computation (GECCO), Compendium, ACM, 2017.
LibreCat: /record/10762
DOI: 10.1145/3067695.3075980

Computational self-awareness as design approach for visual sensor nodes
Z. Guettatfi, P. Hübner, M. Platzner, B. Rinner, in: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
LibreCat: /record/10780
DOI: 10.1109/ReCoSoC.2017.8016147

I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems
I. Ghribi, R.B. Abdallah, M. Khalgui, M. Platzner, in: Communications in Computer and Information Science, Springer , Cham, 2017.
LibreCat: /record/14893
DOI: 10.1007/978-3-319-62569-0_8

An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip
T. Wiersema, A. Bockhorn, M. Platzner, Computers &; Electrical Engineering (2016) 112--122.
LibreCat: /record/222
DOI: 10.1016/j.compeleceng.2016.04.005

FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
LibreCat: /record/5812
DOI: 10.1109/reconfig.2015.7393312

Sprint Diagnostic with RTK-GPS \'26 IMU Sensor Fusion
J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \'26; IMU Sensor Fusion, Paderborn University, 2016.
LibreCat: /record/10612

Implementation of Bilinear Pairings on Reconfigurable Hardware
A.S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware, Paderborn University, 2016.
LibreCat: /record/10616

Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method
O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines Using the Latency Insertion Method, Paderborn University, 2016.
LibreCat: /record/10617

Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs
J. Anwer, M. Platzner, in: Euromicro Conference on Digital System Design (DSD), 2016.
LibreCat: /record/10622
DOI: 10.1109/DSD.2016.35

A novel immersive augmented reality system for prosthesis training and assessment
A. Boschmann, S. Dosen, A. Werner, A. Raies, D. Farina, in: Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI), 2016.
LibreCat: /record/10631

Adaptive playouts for online learning of policies during Monte Carlo Tree Search
T. Graf, M. Platzner, Journal Theoretical Computer Science 644 (2016) 53–62.
LibreCat: /record/10661
DOI: 10.1016/j.tcs.2016.06.029

Beschleunigte Simulation elektrischer Stromnetze mit GPUs
J. Horstmann, Beschleunigte Simulation Elektrischer Stromnetze Mit GPUs, Paderborn University, 2016.
LibreCat: /record/10695

Optimal Generation Dispatch of Distributed Generators Considering Fair Contribution to Grid Voltage Control
C. Ma, P. Kaufmann, J.-C. Töbermann, M. Braun, Renewable Energy 87 (2016) 946–953.
LibreCat: /record/10705
DOI: 10.1016/j.renene.2015.07.083

Operating System Support for Reconfigurable Cache
V. Makeswaran, Operating System Support for Reconfigurable Cache, Paderborn University, 2016.
LibreCat: /record/10706

Private/Shared Data Classification and Implementation for a Multi-Softcore Platform
I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform, Paderborn University, 2016.
LibreCat: /record/10707

Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level
S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8.
LibreCat: /record/10712
DOI: 10.1109/ReConFig.2016.7857193

Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung
M. Schmidt, Konzeption Und Implementierung Einer Digitalen Ansteuerung Für Den Betrieb Einer Elektrischen Sendereinheit Für Induktive Energieübertragung, Paderborn University, 2016.
LibreCat: /record/10755

Applications of Evolutionary Computation - 19th European Conference, EvoApplications
G. Squillero, P. Burelli, A. M. Mora, A. Agapitos, W. S. Bush, S. Cagnoni, C. Cotta, I. De Falco, A. Della Cioppa, F. Divina, A.E. Eiben, A. I. Esparcia-Alc\rquote azar, F. Fern\rquote andez de Vega, K. Glette, E. Haasdijk, J. Ignacio Hidalgo, M. Kampouridis, P. Kaufmann, M. Mavrovouniotis, T. Thanh Nguyen, R. Schaefer, K. Sim, E. Tarantino, N. Urquhart, M. Zhang (editors), Applications of Evolutionary Computation - 19th European Conference, EvoApplications, Springer, 2016.
LibreCat: /record/10758

RCo-Design: New Visual Environment for Reconfigurable Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
LibreCat: /record/10766

New Co-design Methodology for Real-time Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
LibreCat: /record/10768

Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, G. De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems PP (2016) 1–1.
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

Custom Memory Controller for ReconOS
S. Hermansen, Custom Memory Controller for ReconOS, Paderborn University, 2016.
LibreCat: /record/10781

Self-aware Computing Systems: An Engineering Approach
P.R. Lewis, M. Platzner, B. Rinner, J. Tørresen, X. Yao, eds., Self-Aware Computing Systems: An Engineering Approach, Springer, Cham, 2016.
LibreCat: /record/12972
DOI: 10.1007/978-3-319-39675-0

FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L.M. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
LibreCat: /record/15873
DOI: 10.1109/reconfig.2015.7393312

Using Deep Convolutional Neural Networks in Monte Carlo Tree Search
T. Graf, M. Platzner, in: Computer and Games, 2016.
LibreCat: /record/13151

Monte-Carlo Simulation Balancing Revisited
T. Graf, M. Platzner, in: IEEE Computational Intelligence and Games, 2016.
LibreCat: /record/13152

Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware
T. Wiersema, M. Platzner, in: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
LibreCat: /record/132
DOI: 10.1109/ReCoSoC.2016.7533910

ReconOS
A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: D. Koch, F. Hannig, D. Ziener (Eds.), FPGAs for Software Programmers, Springer International Publishing, Cham, 2016, pp. 227–244.
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
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On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach
T. Wiersema, S. Wu, M. Platzner, in: Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
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DOI: 10.1007/978-3-319-16214-0_32

Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.
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