Kumar Jeyakumar, S. (2019). Incremental learning with Support Vector Machine on embedded platforms.
LibreCat: /record/15883

Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
LibreCat: /record/15920

Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
LibreCat: /record/14831

Mehta, J. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip.
LibreCat: /record/15946

Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
LibreCat: /record/14546

Guettatfi, Z., Platzner, M., Kermia, O., &; Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw.2019.00027 
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, &; P. Diniz (Eds.), Applied Reconfigurable Computing (Vol. 11444, pp. 127–136). Springer International Publishing.https://doi.org/10.1007/978-3-030-17227-5_10 
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

Lienen, C. (n.d.). Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
LibreCat: /record/15874

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Mehta, J. D. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip.
LibreCat: /record/52478

Lösch, A., Wiens, A., &; Platzner, M. (2018). Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) (Vol. 10793, pp. 73–84). Cham: Springer International Publishing.https://doi.org/10.1007/978-3-319-77610-1_6 
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

Schnuer, J.-P. (2018). Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn.
LibreCat: /record/3365

Croce, M. (2018). Evaluation of OpenCL-based Compilation for FPGAs. Universität Paderborn.
LibreCat: /record/3366

Hansmeier, T., Platzner, M., &; Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing.https://doi.org/10.1007/978-3-319-78890-6_13 
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
LibreCat: /record/3586

Ho, N. (2018). FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn.https://doi.org/10.17619/UNIPB/1-376 
LibreCat: /record/3720
DOI: 10.17619/UNIPB/1-376

Witschen, L. M., Wiersema, T., &; Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018).
LibreCat: /record/1165

Lösch, A., &; Platzner, M. (2018). A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Milan, Italy: IEEE.https://doi.org/10.1109/asap.2018.8445098 
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 219–224).https://doi.org/10.1109/VLSI-SoC.2018.8645026 
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

Clausing, L. (2018). Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum.
LibreCat: /record/10782

Jentzsch, F. P. (2018). Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn.
LibreCat: /record/1097

Ghribi, I., Abdallah, R. B., Khalgui, M., Li, Z., Alnowibet, K., &; Platzner, M. (2018). R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access, 14078–14092.https://doi.org/10.1109/access.2018.2799852 
LibreCat: /record/12965
DOI: 10.1109/access.2018.2799852

Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn.
LibreCat: /record/3580

Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.
LibreCat: /record/1157

Knorr, C. (2017). OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn.
LibreCat: /record/74

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 94, 287–299.https://doi.org/10.1016/j.ijepes.2017.07.007 
LibreCat: /record/9919
DOI: 10.1016/j.ijepes.2017.07.007

Lösch, A., &; Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).https://doi.org/10.1109/ASAP.2017.7995272 
LibreCat: /record/65
DOI: 10.1109/ASAP.2017.7995272

Isenberg, T., Platzner, M., Wehrheim, H., &; Wiersema, T. (2017). Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems, (4), 61:1--61:23.https://doi.org/10.1145/3054743 
LibreCat: /record/68
DOI: 10.1145/3054743

H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O.,https://doi.org/10.1145/2996468__Wang, Y. (2017). The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems.https://doi.org/10.1145/2996468 
LibreCat: /record/10600
DOI: 10.1145/2996468

F. DeMara, R., Platzner, M., &; Ottavi, M. (2017). Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing.https://doi.org/10.1109/TETC.2016.2641599 
LibreCat: /record/10601
DOI: 10.1109/TETC.2016.2641599

Anwer, J., &; Platzner, M. (2017). Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems, 160–172.https://doi.org/10.1016/j.micpro.2017.06.002 
LibreCat: /record/10611
DOI: 10.1016/j.micpro.2017.06.002

Kaltschmidt, C. (2017). An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University.
LibreCat: /record/10613

Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., &; Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In Design, Automation and Test in Europe (DATE).https://doi.org/10.23919/DATE.2017.7927137 
LibreCat: /record/10630
DOI: 10.23919/DATE.2017.7927137

Riaz, U. (2017). Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University.
LibreCat: /record/10666

Ho, N., Ashraf, I. I., Kaufmann, P., &; Platzner, M. (2017). Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In Proc. Design, Automation and Test in Europe Conf. (DATE).https://doi.org/10.23919/DATE.2017.7927096 
LibreCat: /record/10672
DOI: 10.23919/DATE.2017.7927096

Ho, N., Kaufmann, P., &; Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218).https://doi.org/10.1109/FPT.2017.8280144 
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES).
LibreCat: /record/10692

Dietrich, A. (2017). Reconfigurable Cryptographic Services. Paderborn University.
LibreCat: /record/10708

Shen, C., Kaufmann, P., &; Braun, M. (2017). Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering, 19pp.https://doi.org/10.1049/joe.2017.0032 
LibreCat: /record/10740
DOI: 10.1049/joe.2017.0032

Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2017). Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer.
LibreCat: /record/10759

Kaufmann, P., &; Kalkreuth, R. (2017). Parametrizing Cartesian Genetic Programming: An Empirical Study. In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing.https://doi.org/10.1007/978-3-319-67190-1_26 
LibreCat: /record/10760
DOI: 10.1007/978-3-319-67190-1_26

Kaufmann, P., Ho, N., &; Platzner, M. (2017). Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In Adaptive Hardware and Systems (AHS). IEEE.https://doi.org/10.1109/AHS.2017.8046380 
LibreCat: /record/10761
DOI: 10.1109/AHS.2017.8046380

Kaufmann, P., &; Kalkreuth, R. (2017). An Empirical Study on the Parametrization of Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO), Compendium. ACM.https://doi.org/10.1145/3067695.3075980 
LibreCat: /record/10762
DOI: 10.1145/3067695.3075980

Guettatfi, Z., Hübner, P., Platzner, M., &; Rinner, B. (2017). Computational self-awareness as design approach for visual sensor nodes. In 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (pp. 1–8).https://doi.org/10.1109/ReCoSoC.2017.8016147 
LibreCat: /record/10780
DOI: 10.1109/ReCoSoC.2017.8016147

Ghribi, I., Abdallah, R. B., Khalgui, M., &; Platzner, M. (2017). I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In Communications in Computer and Information Science. Cham: Springer .https://doi.org/10.1007/978-3-319-62569-0_8 
LibreCat: /record/14893
DOI: 10.1007/978-3-319-62569-0_8

Wiersema, T., Bockhorn, A., &; Platzner, M. (2016). An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers &; Electrical Engineering, 112--122.https://doi.org/10.1016/j.compeleceng.2016.04.005 
LibreCat: /record/222
DOI: 10.1016/j.compeleceng.2016.04.005

Boschmann, A., Agne, A., Witschen, L., Thombansen, G., Kraus, F., &; Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.https://doi.org/10.1109/reconfig.2015.7393312 
LibreCat: /record/5812
DOI: 10.1109/reconfig.2015.7393312

Cedric Mertens, J. (2016). Sprint Diagnostic with RTK-GPS \'26; IMU Sensor Fusion. Paderborn University.
LibreCat: /record/10612

Nassery, A. S. (2016). Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University.
LibreCat: /record/10616

Amin, O. (2016). Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University.
LibreCat: /record/10617

Anwer, J., &; Platzner, M. (2016). Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs. In Euromicro Conference on Digital System Design (DSD).https://doi.org/10.1109/DSD.2016.35 
LibreCat: /record/10622
DOI: 10.1109/DSD.2016.35

Boschmann, A., Dosen, S., Werner, A., Raies, A., &; Farina, D. (2016). A novel immersive augmented reality system for prosthesis training and assessment. In Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI).
LibreCat: /record/10631

Graf, T., &; Platzner, M. (2016). Adaptive playouts for online learning of policies during Monte Carlo Tree Search. Journal Theoretical Computer Science, 644, 53–62.https://doi.org/10.1016/j.tcs.2016.06.029 
LibreCat: /record/10661
DOI: 10.1016/j.tcs.2016.06.029

Horstmann, J. (2016). Beschleunigte Simulation elektrischer Stromnetze mit GPUs. Paderborn University.
LibreCat: /record/10695

Ma, C., Kaufmann, P., Töbermann, J.-C., &; Braun, M. (2016). Optimal Generation Dispatch of Distributed Generators Considering Fair Contribution to Grid Voltage Control. Renewable Energy, 87((part 2)), 946–953.https://doi.org/10.1016/j.renene.2015.07.083 
LibreCat: /record/10705
DOI: 10.1016/j.renene.2015.07.083

Makeswaran, V. (2016). Operating System Support for Reconfigurable Cache. Paderborn University.
LibreCat: /record/10706

Ibne Ashraf, I. (2016). Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University.
LibreCat: /record/10707

Meisner, S., &; Platzner, M. (2016). Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on (pp. 1–8).https://doi.org/10.1109/ReConFig.2016.7857193 
LibreCat: /record/10712
DOI: 10.1109/ReConFig.2016.7857193

Schmidt, M. (2016). Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung. Paderborn University.
LibreCat: /record/10755

Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2016). Applications of Evolutionary Computation - 19th European Conference, EvoApplications (Vol. 9597). Springer.
LibreCat: /record/10758

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2016). RCo-Design: New Visual Environment for Reconfigurable Embedded Systems. In Proceedings of the 30th European Simulation and Modelling Conference (ESM).
LibreCat: /record/10766

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2016). New Co-design Methodology for Real-time Embedded Systems. In Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA) (pp. 185–195).
LibreCat: /record/10768

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2016). Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, PP(99), 1–1.https://doi.org/10.1109/TCAD.2016.2547908 
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

Hermansen, S. (2016). Custom Memory Controller for ReconOS. Paderborn University.
LibreCat: /record/10781

Lewis, P. R., Platzner, M., Rinner, B., Tørresen, J., &; Yao, X. (Eds.). (2016). Self-aware Computing Systems: An Engineering Approach. Cham: Springer.https://doi.org/10.1007/978-3-319-39675-0 
LibreCat: /record/12972
DOI: 10.1007/978-3-319-39675-0

Boschmann, A., Agne, A., Witschen, L. M., Thombansen, G., Kraus, F., &; Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Mexiko City, Mexiko: IEEE.https://doi.org/10.1109/reconfig.2015.7393312 
LibreCat: /record/15873
DOI: 10.1109/reconfig.2015.7393312

Graf, T., &; Platzner, M. (2016). Using Deep Convolutional Neural Networks in Monte Carlo Tree Search. In Computer and Games.
LibreCat: /record/13151

Graf, T., &; Platzner, M. (2016). Monte-Carlo Simulation Balancing Revisited. In IEEE Computational Intelligence and Games.
LibreCat: /record/13152

Wiersema, T., &; Platzner, M. (2016). Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware. In Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016) (pp. 1--8).https://doi.org/10.1109/ReCoSoC.2016.7533910 
LibreCat: /record/132
DOI: 10.1109/ReCoSoC.2016.7533910

Agne, A., Platzner, M., Plessl, C., Happe, M., &; Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, &; D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Springer International Publishing.https://doi.org/10.1007/978-3-319-26408-0_13 
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.
LibreCat: /record/168

Wiersema, T., Wu, S., &; Platzner, M. (2015). On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach. In Proceedings of the International Symposium in Reconfigurable Computing (ARC) (pp. 365--372).https://doi.org/10.1007/978-3-319-16214-0_32 
LibreCat: /record/269
DOI: 10.1007/978-3-319-16214-0_32

Knorr, C. (2015). Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn.
LibreCat: /record/3364

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205 
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

Ahmed, A. F. (2015). Self-Optimizing Organic Cache. Paderborn University.
LibreCat: /record/10615

Beisel, T. (2015). Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10624

Hangmann, H. (2015). Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University.
LibreCat: /record/10668

Haupt, C. (2015). Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University.
LibreCat: /record/10671

Ho, N., Ahmed, A. F., Kaufmann, P., &; Platzner, M. (2015). Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. In Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS) (pp. 1–7).https://doi.org/10.1109/AHS.2015.7231178 
LibreCat: /record/10673
DOI: 10.1109/AHS.2015.7231178

Kaufmann, P., &; Shen, C. (2015). Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing. In Genetic and Evolutionary Computation (GECCO) (pp. 409–416). ACM.
LibreCat: /record/10693

Meisner, S., &; Platzner, M. (2015). Comparison of thread signatures for error detection in hybrid multi-cores. In Field Programmable Technology (FPT), 2015 International Conference on (pp. 212–215).https://doi.org/10.1109/FPT.2015.7393153 
LibreCat: /record/10711
DOI: 10.1109/FPT.2015.7393153

Meißner, R. (2015). Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn.
LibreCat: /record/10714

Posewsky, T. (2015). Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University.
LibreCat: /record/10726

M. Mora, A., Squillero, G., Agapitos, A., Burelli, P., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2015). Applications of Evolutionary Computation - 18th European Conference, EvoApplications (Vol. 9028). Copenhagen, Denmark: Springer.
LibreCat: /record/10757

H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O.,https://doi.org/10.1109/FPL.2015.7293747__Wang, Y. (2015). Significant papers from the first 25 years of the FPL conference. In Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL) (pp. 1–3). Imperial College.https://doi.org/10.1109/FPL.2015.7293747 
LibreCat: /record/10765
DOI: 10.1109/FPL.2015.7293747

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2015). New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software. In Proceedings of the 29th European Simulation and Modelling Conference (ESM).
LibreCat: /record/10767

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2015). From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires. IEEE Transactions on Nanotechnology, 14(6), 1117–1126.https://doi.org/10.1109/TNANO.2015.2482359 
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Zhang, J., De Micheli, G., Sanchez, E., &; Reorda, M. S. (2015). On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors. In 2015 IEEE Computer Society Annual Symposium on VLSI (pp. 491–496). IEEE.https://doi.org/10.1109/ISVLSI.2015.13 
LibreCat: /record/10771
DOI: 10.1109/ISVLSI.2015.13

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2015). Fault modeling in controllable polarity silicon nanowire circuits. In Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition (pp. 453–458). EDA Consortium.https://doi.org/10.7873/DATE.2015.0428 
LibreCat: /record/10772
DOI: 10.7873/DATE.2015.0428

Guettatfi, Z., Kermia, O., &; Khouas, A. (2015). Over effective hard real-time hardware tasks scheduling and allocation. In 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College.https://doi.org/10.1109/FPL.2015.7293994 
LibreCat: /record/10779
DOI: 10.1109/FPL.2015.7293994

Graf, T., &; Platzner, M. (2015). Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. In Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers (pp. 1–11). Springer International Publishing.https://doi.org/10.1007/978-3-319-27992-3_1 
LibreCat: /record/13153
DOI: 10.1007/978-3-319-27992-3_1

Kenter, T., Schmitz, H., &; Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015, Article 859425.https://doi.org/10.1155/2015/859425 
LibreCat: /record/296
DOI: 10.1155/2015/859425

Damschen, M., &; Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT).
LibreCat: /record/303
arXiv: 1412.3906

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