S. Kumar Jeyakumar, Incremental learning with Support Vector Machine on embedded platforms. 2019.
LibreCat: /record/15883

M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
LibreCat: /record/15920

N. S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
LibreCat: /record/14831

J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip. 2019.
LibreCat: /record/15946

T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn, 2019.
LibreCat: /record/14546

Z. Guettatfi, M. Platzner, O. Kermia, and A. Khouas, “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware,”10.1109/ipdpsw.2019.00027__2019, doi:10.1109/ipdpsw.2019.00027 .
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Q. A. Ahmed, T. Wiersema, and M. Platzner, “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan,”10.1007/978-3-030-17227-5_10__in Applied Reconfigurable Computing, Darmstadt, Germany, 2019, vol. 11444, pp. 127–136, doi:10.1007/978-3-030-17227-5_10 .
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

C. Lienen, Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
LibreCat: /record/15874

M. Platzner and C. Plessl, “FPGAs im Rechenzentrum,”10.1007/s00287-019-01187-w__Informatik Spektrum, 2019, doi:10.1007/s00287-019-01187-w .
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

J. D. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip. 2019.
LibreCat: /record/52478

A. Lösch, A. Wiens, and M. Platzner, “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes,” in Proceedings of the International Conference on Architecture of Computing Systems (ARCS), 2018, vol. 10793, pp. 73–84.
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn, 2018.
LibreCat: /record/3365

M. Croce, Evaluation of OpenCL-based Compilation for FPGAs. Universität Paderborn, 2018.
LibreCat: /record/3366

T. Hansmeier, M. Platzner, and D. Andrews, “An FPGA/HMC-Based Accelerator for Resolution Proof Checking,” in ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Santorini, Greece, 2018, vol. 10824, pp. 153–165.
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Third Workshop on Approximate Computing (AxC 2018). .
LibreCat: /record/3586

N. Ho, FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn, 2018.
LibreCat: /record/3720
DOI: 10.17619/UNIPB/1-376

L. M. Witschen, T. Wiersema, and M. Platzner, “Making the Case for Proof-carrying Approximate Circuits,” 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
LibreCat: /record/1165

A. Lösch and M. Platzner, “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes,” in 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018.
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

L. Clausing, Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum, 2018.
LibreCat: /record/10782

F. P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.
LibreCat: /record/1097

I. Ghribi, R. B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, and M. Platzner, “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints,” IEEE Access, pp. 14078–14092, 2018.
LibreCat: /record/12965
DOI: 10.1109/access.2018.2799852

T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn, 2017.
LibreCat: /record/3580

L. M. Witschen, A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.
LibreCat: /record/1157

C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.
LibreCat: /record/74

C. Shen, P. Kaufmann, and M. Braun, “Three-Stage Power System Restoration Methodology Considering Renewable Energies,” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), vol. 94, pp. 287–299, 2017.
LibreCat: /record/9919
DOI: 10.1016/j.ijepes.2017.07.007

A. Lösch and M. Platzner, MinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements,” in Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2017.
LibreCat: /record/65
DOI: 10.1109/ASAP.2017.7995272

T. Isenberg, M. Platzner, H. Wehrheim, and T. Wiersema, “Proof-Carrying Hardware via Inductive Invariants,” ACM Transactions on Design Automation of Electronic Systems, no. 4, pp. 61:1--61:23, 2017.
LibreCat: /record/68
DOI: 10.1145/3054743

P. H.W. Leong et al., “The First 25 Years of the FPL Conference – Significant Papers,” ACM Transactions on Reconfigurable Technology and Systems, 2017.
LibreCat: /record/10600
DOI: 10.1145/2996468

R. F. DeMara, M. Platzner, and M. Ottavi, “Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial),” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017.
LibreCat: /record/10601
DOI: 10.1109/TETC.2016.2641599

J. Anwer and M. Platzner, “Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus,” Microprocessors and Microsystems, pp. 160–172, 2017.
LibreCat: /record/10611
DOI: 10.1016/j.micpro.2017.06.002

C. Kaltschmidt, An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University, 2017.
LibreCat: /record/10613

A. Boschmann, G. Thombansen, L. M. Witschen, A. Wiens, and M. Platzner, “A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller,” in Design, Automation and Test in Europe (DATE), 2017.
LibreCat: /record/10630
DOI: 10.23919/DATE.2017.7927137

U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University, 2017.
LibreCat: /record/10666

N. Ho, I. I. Ashraf, P. Kaufmann, and M. Platzner, “Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
LibreCat: /record/10672
DOI: 10.23919/DATE.2017.7927096

N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144

C. Shen, P. Kaufmann, and M. Braun, “Three-Stage Power System Restoration Methodology Considering Renewable Energies,” Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 2017.
LibreCat: /record/10692

A. Dietrich, Reconfigurable Cryptographic Services. Paderborn University, 2017.
LibreCat: /record/10708

C. Shen, P. Kaufmann, and M. Braun, “Fast Network Restoration by Partitioning of Parallel Black Start Zones,” The Journal of Engineering, p. 19pp, 2017.
LibreCat: /record/10740
DOI: 10.1049/joe.2017.0032

G. Squillero et al., Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer, 2017.
LibreCat: /record/10759

P. Kaufmann and R. Kalkreuth, “Parametrizing Cartesian Genetic Programming: An Empirical Study,” in KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, 2017.
LibreCat: /record/10760
DOI: 10.1007/978-3-319-67190-1_26

P. Kaufmann, N. Ho, and M. Platzner, “Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches,” in Adaptive Hardware and Systems (AHS), 2017.
LibreCat: /record/10761
DOI: 10.1109/AHS.2017.8046380

P. Kaufmann and R. Kalkreuth, “An Empirical Study on the Parametrization of Cartesian Genetic Programming,” in Genetic and Evolutionary Computation (GECCO), Compendium, 2017.
LibreCat: /record/10762
DOI: 10.1145/3067695.3075980

Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
LibreCat: /record/10780
DOI: 10.1109/ReCoSoC.2017.8016147

I. Ghribi, R. B. Abdallah, M. Khalgui, and M. Platzner, “I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems,” in Communications in Computer and Information Science, 2017.
LibreCat: /record/14893
DOI: 10.1007/978-3-319-62569-0_8

T. Wiersema, A. Bockhorn, and M. Platzner, “An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip,” Computers &; Electrical Engineering, pp. 112--122, 2016.
LibreCat: /record/222
DOI: 10.1016/j.compeleceng.2016.04.005

A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2016.
LibreCat: /record/5812
DOI: 10.1109/reconfig.2015.7393312

J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \'26; IMU Sensor Fusion. Paderborn University, 2016.
LibreCat: /record/10612

A. S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University, 2016.
LibreCat: /record/10616

O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University, 2016.
LibreCat: /record/10617

J. Anwer and M. Platzner, “Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs,” in Euromicro Conference on Digital System Design (DSD), 2016.
LibreCat: /record/10622
DOI: 10.1109/DSD.2016.35

A. Boschmann, S. Dosen, A. Werner, A. Raies, and D. Farina, “A novel immersive augmented reality system for prosthesis training and assessment,” in Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI), 2016.
LibreCat: /record/10631

T. Graf and M. Platzner, “Adaptive playouts for online learning of policies during Monte Carlo Tree Search,” Journal Theoretical Computer Science, vol. 644, pp. 53–62, 2016.
LibreCat: /record/10661
DOI: 10.1016/j.tcs.2016.06.029

J. Horstmann, Beschleunigte Simulation elektrischer Stromnetze mit GPUs. Paderborn University, 2016.
LibreCat: /record/10695

C. Ma, P. Kaufmann, J.-C. Töbermann, and M. Braun, “Optimal Generation Dispatch of Distributed Generators Considering Fair Contribution to Grid Voltage Control,” Renewable Energy, vol. 87, no. (part 2), pp. 946–953, 2016.
LibreCat: /record/10705
DOI: 10.1016/j.renene.2015.07.083

V. Makeswaran, Operating System Support for Reconfigurable Cache. Paderborn University, 2016.
LibreCat: /record/10706

I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University, 2016.
LibreCat: /record/10707

S. Meisner and M. Platzner, “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level,” in Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on, 2016, pp. 1–8.
LibreCat: /record/10712
DOI: 10.1109/ReConFig.2016.7857193

M. Schmidt, Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung. Paderborn University, 2016.
LibreCat: /record/10755

G. Squillero et al., Applications of Evolutionary Computation - 19th European Conference, EvoApplications, vol. 9597. Springer, 2016.
LibreCat: /record/10758

I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “RCo-Design: New Visual Environment for Reconfigurable Embedded Systems,” in Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
LibreCat: /record/10766

I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Co-design Methodology for Real-time Embedded Systems,” in Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
LibreCat: /record/10768

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. PP, no. 99, pp. 1–1, 2016.
LibreCat: /record/10769
DOI: 10.1109/TCAD.2016.2547908

S. Hermansen, Custom Memory Controller for ReconOS. Paderborn University, 2016.
LibreCat: /record/10781

P. R. Lewis, M. Platzner, B. Rinner, J. Tørresen, and X. Yao, Eds., Self-aware Computing Systems: An Engineering Approach. Cham: Springer, 2016.
LibreCat: /record/12972
DOI: 10.1007/978-3-319-39675-0

A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
LibreCat: /record/15873
DOI: 10.1109/reconfig.2015.7393312

T. Graf and M. Platzner, “Using Deep Convolutional Neural Networks in Monte Carlo Tree Search,” in Computer and Games, 2016.
LibreCat: /record/13151

T. Graf and M. Platzner, “Monte-Carlo Simulation Balancing Revisited,” in IEEE Computational Intelligence and Games, 2016.
LibreCat: /record/13152

T. Wiersema and M. Platzner, “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware,” in Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
LibreCat: /record/132
DOI: 10.1109/ReCoSoC.2016.7533910

A. Agne, M. Platzner, C. Plessl, M. Happe, and E. Lübbers, “ReconOS,” in FPGAs for Software Programmers, D. Koch, F. Hannig, and D. Ziener, Eds. Cham: Springer International Publishing, 2016, pp. 227–244.
LibreCat: /record/29
DOI: 10.1007/978-3-319-26408-0_13

A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-aware Compute Nodes,” in Self-aware Computing Systems, Cham: Springer International Publishing, 2016, pp. 145–165.
LibreCat: /record/156
DOI: 10.1007/978-3-319-39675-0_8

A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 2016, pp. 912–917.
LibreCat: /record/168

T. Wiersema, S. Wu, and M. Platzner, “On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach,” in Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
LibreCat: /record/269
DOI: 10.1007/978-3-319-16214-0_32

C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn, 2015.
LibreCat: /record/3364

J. Torresen, C. Plessl, and X. Yao, “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction,” IEEE Computer, vol. 48, no. 7, pp. 18–20, 2015.
LibreCat: /record/1772
DOI: 10.1109/MC.2015.205

A. F. Ahmed, Self-Optimizing Organic Cache. Paderborn University, 2015.
LibreCat: /record/10615

T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing. Berlin: Logos Verlag Berlin GmbH, 2015.
LibreCat: /record/10624

H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University, 2015.
LibreCat: /record/10668

C. Haupt, Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University, 2015.
LibreCat: /record/10671

N. Ho, A. F. Ahmed, P. Kaufmann, and M. Platzner, “Microarchitectural optimization by means of reconfigurable and evolvable cache mappings,” in Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
LibreCat: /record/10673
DOI: 10.1109/AHS.2015.7231178

P. Kaufmann and C. Shen, “Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing,” in Genetic and Evolutionary Computation (GECCO), 2015, pp. 409–416.
LibreCat: /record/10693

S. Meisner and M. Platzner, “Comparison of thread signatures for error detection in hybrid multi-cores,” in Field Programmable Technology (FPT), 2015 International Conference on, 2015, pp. 212–215.
LibreCat: /record/10711
DOI: 10.1109/FPT.2015.7393153

R. Meißner, Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn, 2015.
LibreCat: /record/10714

T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University, 2015.
LibreCat: /record/10726

A. M. Mora et al., Applications of Evolutionary Computation - 18th European Conference, EvoApplications, vol. 9028. Copenhagen, Denmark: Springer, 2015.
LibreCat: /record/10757

P. H.W. Leong et al., “Significant papers from the first 25 years of the FPL conference,” in Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), 2015, pp. 1–3.
LibreCat: /record/10765
DOI: 10.1109/FPL.2015.7293747

I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software,” in Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
LibreCat: /record/10767

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires,” IEEE Transactions on Nanotechnology, vol. 14, no. 6, pp. 1117–1126, 2015.
LibreCat: /record/10770
DOI: 10.1109/TNANO.2015.2482359

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, and M. S. Reorda, “On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors,” in 2015 IEEE Computer Society Annual Symposium on VLSI, 2015, pp. 491–496.
LibreCat: /record/10771
DOI: 10.1109/ISVLSI.2015.13

H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, and G. De Micheli, “Fault modeling in controllable polarity silicon nanowire circuits,” in Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition, 2015, pp. 453–458.
LibreCat: /record/10772
DOI: 10.7873/DATE.2015.0428

Z. Guettatfi, O. Kermia, and A. Khouas, “Over effective hard real-time hardware tasks scheduling and allocation,” in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.
LibreCat: /record/10779
DOI: 10.1109/FPL.2015.7293994

T. Graf and M. Platzner, “Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning,” in Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, 2015, pp. 1–11.
LibreCat: /record/13153
DOI: 10.1007/978-3-319-27992-3_1

T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,”10.1155/2015/859425__International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi:10.1155/2015/859425 .
LibreCat: /record/296
DOI: 10.1155/2015/859425

M. Damschen and C. Plessl, “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores,” 2015.
LibreCat: /record/303
arXiv: 1412.3906

J. Schumacher et al., “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm,”10.1145/2675743.2771824__2015, doi:10.1145/2675743.2771824 .
LibreCat: /record/1773
DOI: 10.1145/2675743.2771824

C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,”10.1007/s00287-015-0911-z__Informatik Spektrum, no. 5, pp. 396–399, 2015, doi:10.1007/s00287-015-0911-z .
LibreCat: /record/1768
DOI: 10.1007/s00287-015-0911-z

M. Damschen, H. Riebler, G. F. Vaz, and C. Plessl, “Transparent offloading of computational hotspots from binary code to Xeon Phi,”10.7873/DATE.2015.1124__in Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), 2015, pp. 1078–1083, doi:10.7873/DATE.2015.1124 .
LibreCat: /record/238
DOI: 10.7873/DATE.2015.1124

S. Meisner and M. Platzner, “Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection,” in Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC), 2014, pp. 283–290.
LibreCat: /record/347
DOI: 10.1007/978-3-319-05960-0_30

T. Graf, L. Schaefers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go,” in Proc. Conf. on Computers and Games (CG), 2014, no. 8427, pp. 14–25.
LibreCat: /record/1782
DOI: 10.1007/978-3-319-09165-5_2

T. Wiersema, S. Drzevitzky, and M. Platzner, “Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
LibreCat: /record/399
DOI: 10.1109/FPT.2014.7082771