Platzner, M. (2000). Reconfigurable accelerators for combinatorial problems. Computer, 33(4), 58–60.https://doi.org/10.1109/2.839322 

Eisenring, M., &; Platzner, M. (2000). Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers &; Digital Techniques, 147, 159–165.https://doi.org/10.1049/ip-cdt:20000496 

Platzner, M., Rinner, B., &; Weiss, R. (2000). Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems, 15(2), 62–68.https://doi.org/10.1109/5254.850829 

Eisenring, M. H., &; Platzner, M. (2000). An Implementation Framework for Run-time Reconfigurable Systems. In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE) (pp. 151–157). CSREA Press.

Eisenring, M., &; Platzner, M. (2000). Optimization of Run-time Reconfigurable Embedded Systems. In Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL) (pp. 565–574). Springer.

Mencer, O., &; Platzner, M. (1999). Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment. In Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32). IEEE CS Press.https://doi.org/10.1109/hicss.1999.772883 

Eisenring, M., Platzner, M., &; Thiele, L. (1999). Communication Synthesis for Reconfigurable Embedded Systems. In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL) (Vol. 1673, pp. 205–214). Springer.https://doi.org/10.1007/978-3-540-48302-1_21 

Platzner, M. (1998). Reconfigurable Computer Architectures. E&;i Elektrotechnik Und Informationstechnik, 115, 143–148.

Platzner, M., &; Rinner, B. (1998). Design and Implementation of a Parallel Constraint Satisfaction Algorithm. International Journal of Computers &; Their Applications, 5, 106–116.

Platzner, M., Rinner, B., &; Weiss, R. (1998). A Distributed Computer Architecture for Fast Qualitative Simulation  (pp. 106–107). Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities.

Platzner, M., &; De Micheli, G. (1998). Acceleration of satisfiability algorithms by reconfigurable hardware. In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL)  (pp. 69–78). Berlin, Heidelberg: Springer .https://doi.org/10.1007/bfb0055234 

Platzner, M., Rinner, B., &; Weiss, R. (1997). A Computer Architecture to Support Qualitative Simulation in Industrial Applications. E &; i Elektrotechnik Und Informationstechnik, 114, 13–18.

Platzner, M., Rinner, B., &; Weiss, R. (1997). Parallel qualitative simulation. Simulation Practice and Theory, 5(7–8), 623–638.https://doi.org/10.1016/s0928-4869(97)00008-6 

Platzner, M., &; Peters, L. (1997). Fast Signature Segmentation on a Multi-DSP Architecture. In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing (Vol. 3166).

Röwekamp, T., Platzner, M., &; Peters, L. (1997). Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP. In Proceedings of the 8th International Conference on Signal Processing Applications &; Technology (ICSPAT) (pp. 829–833).

Lind, E., Platzner, M., &; Rinner, B. (1996). A Multi-DSP System with Dynamically Reconfigurable Processors. In Proceedings of the 7th International Conference on Signal Processing Applications &; Technology (ICSPAT).

Platzner, M., Rinner, B., &; Weiss, R. (1995). Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J.UCS Journal of Universal Computer Science, 12, 811–820.

Platzner, M., Rinner, B., &; Weiss, R. (1995). A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs. In Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing  (pp. 311–318). IEEE CS Press.

Brenner, E., Ginthör-Kalcsics, R., Hranitzky, R., Platzner, M., Rinner, B., Steger, C., &; Weiss, R. (1995). High-Performance Simulators Based on Multi-TM0. In Proceedings of the 5th Annual Texas Instruments TM0 Educators Conference.

Friedl, G., Platzner, M., &; Rinner, B. (1995). A Special-Purpose Coprocessor for Qualitative Simulation. In Proceedings of the EURO-PAR’95 International Conference on Parallel Processing (pp. 695–698). Springer International Publishing.

Platzner, M., Rinner, B., &; Weiss, R. (1995). Parallel Qualitative Simulation. In Proceedings of the EUROSIM Congress (pp. 231–236). Elsevier.

Platzner, M., &; Rinner, B. (1995). Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture. In Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems (pp. 494–501). ISCA.

Platzner, M., &; Rinner, B. (1995). High-Performance Qualitative Simulation on a Multi-DSP Architecture. In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT).

Hranitzky, R., &; Platzner, M. (1995). Design and Implementation of Adaptive Digital Filters on a Multi-TM0 System. In Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT).

Platzner, M., Steger, C., &; Weiss, R. (1994). Experimental Evaluation of Multi-DSP Architectures in High Performance Applications. In Proceedings of the 7th Mediterranean Electrotechnical Conference. IEEE Press.

Platzner, M., &; Steger, C. (1993). Erfahrungen mit einer Multi-Signalprozessorarchitektur (TM0). Mikroelektronik.

Platzner, M., Steger, C., &; Weiss, R. (1993). Performance Measurements on a Multi-DSP Architecture with TM0. In Proceedings of the 4th International Conference on Signal Processing Applications &; Technology (ICSPAT). DSP Associates.

Ginthör, R., Platzner, M., &; Weiss, R. (1992). Experimental Results to Interprocessor Communication in Distributed Transputer-Systems. In Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications (pp. 45–54).