Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., &; Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases.https://doi.org/10.1007/978-3-030-93736-2_27 

Guetttatfi, Z., Kaufmann, P., &; Platzner, M. (2020). Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC).

Chandrakar, K. (2020). Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.

Henke, L.-S. (2020). Evaluation of a ReconOS-ROS Combination based on a Video Processing Application.

Gatica, C. P., &; Platzner, M. (2020). Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg.https://doi.org/10.1007/978-3-662-59084-3_9 

Witschen, L. M., Wiersema, T., &; Platzner, M. (2020). Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems, 28(9), 2084–2088.https://doi.org/10.1109/TVLSI.2020.3008061 

Ho, N., Kaufmann, P., &; Platzner, M. (2020). Evolution of Application-Specific Cache Mappings. International Journal of Hybrid Intelligent Systems.

Witschen, L. M., Wiersema, T., &; Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).

Lienen, C., Platzner, M., &; Rinner, B. (2020). ReconROS: Flexible Hardware Acceleration for RO Applications. In Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT).

Thiele, S. (2020). Implementing Machine Learning Functions as PYNQ FPGA Overlays.

Jaganath, V. (2020). Extension and Evaluation of Python-based High-Level Synthesis Tool Flows.

Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1756–1764.https://doi.org/10.1145/3377929.3398106 

Anwer, J., Meisner, S., &; Platzner, M. (2020). Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing, 1–19.https://doi.org/10.1155/2020/2808710 

Bellman, K., Dutt, N., Esterle, L., Herkersdorf, A., Jantsch, A., Landauer, C.,  Tammemäe, K. (2020). Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, Accepted for Publication, 1–24.

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2020). A Hybrid Synthesis Methodology for Approximate Circuits. In Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020 (pp. 421–426). Beijing, China: ACM.https://doi.org/10.1145/3386263.3406952 

Hansmeier, T., Kaufmann, P., &; Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM).https://doi.org/10.1145/3377929.3389968 

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw50202.2020.00012 

Jentzsch, F. P. (2020). Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture.

Lösch, A., &; Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 6–16.https://doi.org/10.1109/IPDPSW50202.2020.00012 

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (2019). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability, 99, 277–290.https://doi.org/10.1016/j.microrel.2019.04.003 

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).

Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &; Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM.https://doi.org/10.1145/3299874.3317998 

Boschmann, A., Agne, A., Thombansen, G., Witschen, L. M., Kraus, F., &; Platzner, M. (2019). Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing, 123, 77–89.https://doi.org/10.1016/j.jpdc.2018.07.004 

Hansmeier, T., Platzner, M., Pantho, M. J. H., &; Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272.https://doi.org/10.1007/s11265-018-1435-y 

Ho, N., Kaufmann, P., &; Platzner, M. (2019). Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In World Congress on Nature and Biologically Inspired Computing (NaBIC). Springer.

Kumar Jeyakumar, S. (2019). Incremental learning with Support Vector Machine on embedded platforms.

Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.

Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.

Mehta, J. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip.

Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.

Guettatfi, Z., Platzner, M., Kermia, O., &; Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).https://doi.org/10.1109/ipdpsw.2019.00027 

Ahmed, Q. A., Wiersema, T., &; Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, &; P. Diniz (Eds.), Applied Reconfigurable Computing (Vol. 11444, pp. 127–136). Springer International Publishing.https://doi.org/10.1007/978-3-030-17227-5_10 

Lienen, C. (n.d.). Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.

Platzner, M., &; Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum.https://doi.org/10.1007/s00287-019-01187-w 

Mehta, J. D. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip.

Lösch, A., Wiens, A., &; Platzner, M. (2018). Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) (Vol. 10793, pp. 73–84). Cham: Springer International Publishing.https://doi.org/10.1007/978-3-319-77610-1_6 

Schnuer, J.-P. (2018). Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn.

Croce, M. (2018). Evaluation of OpenCL-based Compilation for FPGAs. Universität Paderborn.

Hansmeier, T., Platzner, M., &; Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing.https://doi.org/10.1007/978-3-319-78890-6_13 

Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &; Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).

Ho, N. (2018). FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn.https://doi.org/10.17619/UNIPB/1-376 

Witschen, L. M., Wiersema, T., &; Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018).

Lösch, A., &; Platzner, M. (2018). A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Milan, Italy: IEEE.https://doi.org/10.1109/asap.2018.8445098 

Awais, M., Ghasemzadeh Mohammadi, H., &; Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 219–224).https://doi.org/10.1109/VLSI-SoC.2018.8645026 

Clausing, L. (2018). Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum.

Jentzsch, F. P. (2018). Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn.

Ghribi, I., Abdallah, R. B., Khalgui, M., Li, Z., Alnowibet, K., &; Platzner, M. (2018). R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access, 14078–14092.https://doi.org/10.1109/access.2018.2799852 

Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn.

Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.

Knorr, C. (2017). OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn.

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 94, 287–299.https://doi.org/10.1016/j.ijepes.2017.07.007 

Lösch, A., &; Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).https://doi.org/10.1109/ASAP.2017.7995272 

Isenberg, T., Platzner, M., Wehrheim, H., &; Wiersema, T. (2017). Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems, (4), 61:1--61:23.https://doi.org/10.1145/3054743 

H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O.,https://doi.org/10.1145/2996468__Wang, Y. (2017). The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems.https://doi.org/10.1145/2996468 

F. DeMara, R., Platzner, M., &; Ottavi, M. (2017). Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing.https://doi.org/10.1109/TETC.2016.2641599 

Anwer, J., &; Platzner, M. (2017). Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems, 160–172.https://doi.org/10.1016/j.micpro.2017.06.002 

Kaltschmidt, C. (2017). An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University.

Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., &; Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In Design, Automation and Test in Europe (DATE).https://doi.org/10.23919/DATE.2017.7927137 

Riaz, U. (2017). Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University.

Ho, N., Ashraf, I. I., Kaufmann, P., &; Platzner, M. (2017). Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In Proc. Design, Automation and Test in Europe Conf. (DATE).https://doi.org/10.23919/DATE.2017.7927096 

Ho, N., Kaufmann, P., &; Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218).https://doi.org/10.1109/FPT.2017.8280144 

Shen, C., Kaufmann, P., &; Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES).

Dietrich, A. (2017). Reconfigurable Cryptographic Services. Paderborn University.

Shen, C., Kaufmann, P., &; Braun, M. (2017). Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering, 19pp.https://doi.org/10.1049/joe.2017.0032 

Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2017). Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer.

Kaufmann, P., &; Kalkreuth, R. (2017). Parametrizing Cartesian Genetic Programming: An Empirical Study. In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing.https://doi.org/10.1007/978-3-319-67190-1_26 

Kaufmann, P., Ho, N., &; Platzner, M. (2017). Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In Adaptive Hardware and Systems (AHS). IEEE.https://doi.org/10.1109/AHS.2017.8046380 

Kaufmann, P., &; Kalkreuth, R. (2017). An Empirical Study on the Parametrization of Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO), Compendium. ACM.https://doi.org/10.1145/3067695.3075980 

Guettatfi, Z., Hübner, P., Platzner, M., &; Rinner, B. (2017). Computational self-awareness as design approach for visual sensor nodes. In 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (pp. 1–8).https://doi.org/10.1109/ReCoSoC.2017.8016147 

Ghribi, I., Abdallah, R. B., Khalgui, M., &; Platzner, M. (2017). I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In Communications in Computer and Information Science. Cham: Springer .https://doi.org/10.1007/978-3-319-62569-0_8 

Wiersema, T., Bockhorn, A., &; Platzner, M. (2016). An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers &; Electrical Engineering, 112--122.https://doi.org/10.1016/j.compeleceng.2016.04.005 

Boschmann, A., Agne, A., Witschen, L., Thombansen, G., Kraus, F., &; Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.https://doi.org/10.1109/reconfig.2015.7393312 

Cedric Mertens, J. (2016). Sprint Diagnostic with RTK-GPS \'26; IMU Sensor Fusion. Paderborn University.

Nassery, A. S. (2016). Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University.

Amin, O. (2016). Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University.

Anwer, J., &; Platzner, M. (2016). Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs. In Euromicro Conference on Digital System Design (DSD).https://doi.org/10.1109/DSD.2016.35 

Boschmann, A., Dosen, S., Werner, A., Raies, A., &; Farina, D. (2016). A novel immersive augmented reality system for prosthesis training and assessment. In Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI).

Graf, T., &; Platzner, M. (2016). Adaptive playouts for online learning of policies during Monte Carlo Tree Search. Journal Theoretical Computer Science, 644, 53–62.https://doi.org/10.1016/j.tcs.2016.06.029 

Horstmann, J. (2016). Beschleunigte Simulation elektrischer Stromnetze mit GPUs. Paderborn University.

Ma, C., Kaufmann, P., Töbermann, J.-C., &; Braun, M. (2016). Optimal Generation Dispatch of Distributed Generators Considering Fair Contribution to Grid Voltage Control. Renewable Energy, 87((part 2)), 946–953.https://doi.org/10.1016/j.renene.2015.07.083 

Makeswaran, V. (2016). Operating System Support for Reconfigurable Cache. Paderborn University.

Ibne Ashraf, I. (2016). Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University.

Meisner, S., &; Platzner, M. (2016). Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on (pp. 1–8).https://doi.org/10.1109/ReConFig.2016.7857193 

Schmidt, M. (2016). Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung. Paderborn University.

Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S.,  Zhang (editors), M. (2016). Applications of Evolutionary Computation - 19th European Conference, EvoApplications (Vol. 9597). Springer.

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2016). RCo-Design: New Visual Environment for Reconfigurable Embedded Systems. In Proceedings of the 30th European Simulation and Modelling Conference (ESM).

Ghribi, I., Ben Abdallah, R., Khalgui, M., &; Platzner, M. (2016). New Co-design Methodology for Real-time Embedded Systems. In Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA) (pp. 185–195).

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., &; De Micheli, G. (2016). Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, PP(99), 1–1.https://doi.org/10.1109/TCAD.2016.2547908 

Hermansen, S. (2016). Custom Memory Controller for ReconOS. Paderborn University.

Lewis, P. R., Platzner, M., Rinner, B., Tørresen, J., &; Yao, X. (Eds.). (2016). Self-aware Computing Systems: An Engineering Approach. Cham: Springer.https://doi.org/10.1007/978-3-319-39675-0 

Boschmann, A., Agne, A., Witschen, L. M., Thombansen, G., Kraus, F., &; Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Mexiko City, Mexiko: IEEE.https://doi.org/10.1109/reconfig.2015.7393312 

Graf, T., &; Platzner, M. (2016). Using Deep Convolutional Neural Networks in Monte Carlo Tree Search. In Computer and Games.

Graf, T., &; Platzner, M. (2016). Monte-Carlo Simulation Balancing Revisited. In IEEE Computational Intelligence and Games.

Wiersema, T., &; Platzner, M. (2016). Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware. In Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016) (pp. 1--8).https://doi.org/10.1109/ReCoSoC.2016.7533910 

Agne, A., Platzner, M., Plessl, C., Happe, M., &; Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, &; D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Springer International Publishing.https://doi.org/10.1007/978-3-319-26408-0_13 

Agne, A., Happe, M., Lösch, A., Plessl, C., &; Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Springer International Publishing.https://doi.org/10.1007/978-3-319-39675-0_8 

Lösch, A., Beisel, T., Kenter, T., Plessl, C., &; Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 912–917.

Wiersema, T., Wu, S., &; Platzner, M. (2015). On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach. In Proceedings of the International Symposium in Reconfigurable Computing (ARC) (pp. 365--372).https://doi.org/10.1007/978-3-319-16214-0_32 

Knorr, C. (2015). Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn.

Torresen, J., Plessl, C., &; Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20.https://doi.org/10.1109/MC.2015.205