Generating Adjustable Temperature Gradients on modern FPGAs
H. Hangmann, Generating Adjustable Temperature Gradients on Modern FPGAs, Paderborn University, 2012.
LibreCat: /record/10667

Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture
P. Kaufmann, K. Glette, M. Platzner, J. Torresen, International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3 (2012) 17–31.
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

Wieder natürlich gehen und greifen
M. Platzner, A. Boschmann, P. Kaufmann, Wieder Natürlich Gehen Und Greifen, 2012.
LibreCat: /record/10723

Stereo Matching on a HC-1 Hybrid Core Computer
H. Schmitz, Stereo Matching on a HC-1 Hybrid Core Computer, Paderborn University, 2012.
LibreCat: /record/10734

Entwicklung eines Picoblaze Compilers mit dem Gentle Compiler Construction System
C. Topmöller, Entwicklung Eines Picoblaze Compilers Mit Dem Gentle Compiler Construction System, Paderborn University, 2012.
LibreCat: /record/10747

Analysis of Pattern Based Model Design and Learning in Computer-Go
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
LibreCat: /record/10754

An outlook for self-awareness in computing systems
P. Lewis, M. Platzner, X. Yao, An Outlook for Self-Awareness in Computing Systems, Awareness Magazine, 2012.
LibreCat: /record/13462

Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Pragma based parallelization - Trading hardware efficiency for ease of use?
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Hardware/Software Platform for Self-aware Compute Nodes
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat: /record/609

Turning control flow graphs into function calls: Code generation for heterogeneous architectures
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat: /record/2180

On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Estimation and Partitioning for CPU-Accelerator Architectures
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
LibreCat: /record/2191

Hardware Virtualization on Dynamically Reconfigurable Embedded Processors
C. Plessl, M. Platzner, in: M. Khalgui, H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, IGI Global, Hershey, PA, USA, 2011.
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Parallel Monte-Carlo Tree Search for HPC Systems
T. Graf, U. Lorenz, M. Platzner, L. Schaefers, in: Proc. European Conf. on Parallel Processing (Euro-Par), Springer, Berlin / Heidelberg, 2011.
LibreCat: /record/2204
DOI: 10.1007/978-3-642-23397-5_36

Achieving Hardware Security for Reconû01gurable Systems on Chip by a Proof-Carrying Code Approach
S. Drzevitzky, M. Platzner, in: Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
LibreCat: /record/666
DOI: 10.1109/ReCoSoC.2011.5981499