Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
LibreCat: /record/2198
DOI: 10.1109/IPDPS.2011.153

Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification
S. Drzevitzky, U. Kastens, M. Platzner, International Journal of Reconfigurable Computing 2010 (2010).
LibreCat: /record/10605
DOI: 10.1155/2010/180242

Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen
A. Agne, Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen, Paderborn University, 2010.
LibreCat: /record/10614

EMG-basierte Ganganalyse
A. Boschmann, EMG-Basierte Ganganalyse, Paderborn University, 2010.
LibreCat: /record/10629

Evolvable Cache Controller
D. Breitlauch, Evolvable Cache Controller, Paderborn University, 2010.
LibreCat: /record/10642

Soft Microprocessors with tightly coupled Application-Specific Coprocessors
D. Dridger, Soft Microprocessors with Tightly Coupled Application-Specific Coprocessors, Paderborn University, 2010.
LibreCat: /record/10649

Parallelization of the UCT Algorithm on HPC-Clusters
T. Graf, Parallelization of the UCT Algorithm on HPC-Clusters, Paderborn University, 2010.
LibreCat: /record/10657

Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms
P. Kaufmann, K. Englehart, M. Platzner, in: International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), IEEE, 2010, pp. 6357–6360.
LibreCat: /record/10683

A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers
P. Kaufmann, T. Knieper, M. Platzner, in: IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), IEEE, 2010, pp. 541–548.
LibreCat: /record/10686

Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial)
U. Kebschull, M. Platzner, J. Teich, IET Computers Digital Techniques 4 (2010) 157–158.
LibreCat: /record/10694
DOI: 10.1049/iet-cdt.2010.9044

Hybridization of Global Multi-Objective and Local Search Techniques
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques, Paderborn University, 2010.
LibreCat: /record/10697

Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, J. Torresen, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2010, pp. 250–261.
LibreCat: /record/10699

ReconOS: An Operating System for Dynamically Reconfigurable Hardware
E. Lübbers, M. Platzner, in: M. Platzner, J. Teich, N. Wehn (Eds.), Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, Springer-Verlag GmbH, 2010, pp. 269–290.
LibreCat: /record/10704
DOI: 10.1007/978-90-481-3485-4_13

FPGA/CPU Multicore-Plattform für ReconOS/eCos
R. Meiche, FPGA/CPU Multicore-Plattform Für ReconOS/ECos, Paderborn University, 2010.
LibreCat: /record/10710

Transparente Hardwarebeschleunigung durch Shared Library Interposing
M. Niekamp, Transparente Hardwarebeschleunigung Durch Shared Library Interposing, Paderborn University, 2010.
LibreCat: /record/10717

A Token-Ring Network-On-Chip for Message Passing in ReconOS
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS, Paderborn University, 2010.
LibreCat: /record/10731

Scheduling Support for Heterogeneous Hardware Accelerators under Linux
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux, Paderborn University, 2010.
LibreCat: /record/10752

Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications
M. Platzner, J. Teich, N. Wehn, eds., Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, Springer-Verlag GmbH, 2010.
LibreCat: /record/10763
DOI: 10.1007/978-90-481-3485-4

Sub-threshold charge recovery circuits
M. Khatir, H. Ghasemzadeh Mohammadi, A. Ejlali, in: Computer Design (ICCD), 2010 IEEE International Conference On, IEEE, 2010, pp. 138–144.
LibreCat: /record/10776
DOI: 10.1109/ICCD.2010.5647815

A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
H. Giefers, M. Platzner, in: Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2010.
LibreCat: /record/13640