Walder, Herbert, and Marco Platzner. “Online Scheduling for Block-Partitioned Reconfigurable Devices.”10.1109/date.2003.1253622__Proceedings Design, Automation and Test in Europe Conference (DATE), IEEE CS Press, 2003, pp. 290–95, doi:10.1109/date.2003.1253622.
LibreCat: /record/13612
DOI: 10.1109/date.2003.1253622

Walder, Herbert, et al. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.”10.1109/ipdps.2003.1213329__Proceedings International Parallel and Distributed Processing Symposium, IEEE CS Press, 2003, doi:10.1109/ipdps.2003.1213329.
LibreCat: /record/13613
DOI: 10.1109/ipdps.2003.1213329

Walder, Herbert, and Marco Platzner. “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.” Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 284–87.
LibreCat: /record/13614

Steiger, Christoph, et al. “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices.”10.1007/978-3-540-45234-8_56__Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), Springer, 2003, pp. 575–84, doi:10.1007/978-3-540-45234-8_56.
LibreCat: /record/13615
DOI: 10.1007/978-3-540-45234-8_56

Steiger, Christoph, et al. “Online Scheduling and Placement of Real-Time Tasks to Partially Reconfigurable Devices.”10.1109/real.2003.1253269__Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), IEEE CS Press, 2003, pp. 252–235, doi:10.1109/real.2003.1253269.
LibreCat: /record/13617
DOI: 10.1109/real.2003.1253269

Plessl, Christian, et al. “Reconfigurable Hardware in Wearable Computing Nodes.”10.1109/ISWC.2002.1167250__Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–22, doi:10.1109/ISWC.2002.1167250.
LibreCat: /record/2423
DOI: 10.1109/ISWC.2002.1167250

Dyer, Matthias, et al. “Partially Reconfigurable Cores for Xilinx Virtex.”10.1007/3-540-46117-5__Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2438, Springer, 2002, pp. 292–301, doi:10.1007/3-540-46117-5.
LibreCat: /record/2424
DOI: 10.1007/3-540-46117-5

Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.”10.1109/FPGA.2002.1106671__Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–72, doi:10.1109/FPGA.2002.1106671.
LibreCat: /record/2425
DOI: 10.1109/FPGA.2002.1106671

Eisenring, Michael, and Marco Platzner. “A Framework for Run-Time Reconfigurable Systems.”10.1023/a:1013627403946__The Journal of Supercomputing, vol. 21, no. 2, Kluwer Academic Publishers, 2002, pp. 145–59, doi:10.1023/a:1013627403946.
LibreCat: /record/10651
DOI: 10.1023/a:1013627403946

Walder, Herbert, and Marco Platzner. “Non-Preemptive Multitasking on FPGAs: Task Placement and Footprint Transform.” Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2002, pp. 24–30.
LibreCat: /record/13611

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat: /record/2428

Enzler, Rolf, et al. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.”10.1117/12.434376__Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, vol. 4525, 2001, pp. 135–46, doi:10.1117/12.434376.
LibreCat: /record/2432
DOI: 10.1117/12.434376

Mencer, Oskar, et al. “Object-Oriented Domain Specific Compilers for Programming FPGAs.”10.1109/92.920835__IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 1, 2001, pp. 205–10, doi:10.1109/92.920835.
LibreCat: /record/10713
DOI: 10.1109/92.920835

Enzler, Rolf, and Marco Platzner. Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat: /record/13463

Platzner, Marco. “Reconfigurable Accelerators for Combinatorial Problems.”10.1109/2.839322__Computer, vol. 33, no. 4, Institute of Electrical and Electronics Engineers (IEEE), 2000, pp. 58–60, doi:10.1109/2.839322.
LibreCat: /record/6507
DOI: 10.1109/2.839322

Eisenring, Michael, and Marco Platzner. “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems.”10.1049/ip-cdt:20000496__IEE Proceedings -- Computers &; Digital Techniques, vol. 147, IET, 2000, pp. 159–65, doi:10.1049/ip-cdt:20000496.
LibreCat: /record/10606
DOI: 10.1049/ip-cdt:20000496

Platzner, Marco, et al. “Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.”10.1109/5254.850829__IEEE Intelligent Systems, vol. 15, no. 2, Institute of Electrical \'26; Electronics Engineers (IEEE), 2000, pp. 62–68, doi:10.1109/5254.850829.
LibreCat: /record/10725
DOI: 10.1109/5254.850829

Eisenring, Michael H., and Marco Platzner. “An Implementation Framework for Run-Time Reconfigurable Systems.” Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), CSREA Press, 2000, pp. 151–57.
LibreCat: /record/13609

Eisenring, Michael, and Marco Platzner. “Optimization of Run-Time Reconfigurable Embedded Systems.” Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), Springer, 2000, pp. 565–74.
LibreCat: /record/13610

Mencer, Oskar, and Marco Platzner. “Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.”10.1109/hicss.1999.772883__Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), IEEE CS Press, 1999, doi:10.1109/hicss.1999.772883.
LibreCat: /record/13607
DOI: 10.1109/hicss.1999.772883