S. Kumar Jeyakumar, Incremental learning with Support Vector Machine on embedded platforms. 2019.
LibreCat: /record/15883

M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
LibreCat: /record/15920

N. S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
LibreCat: /record/14831

J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip. 2019.
LibreCat: /record/15946

T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn, 2019.
LibreCat: /record/14546

Z. Guettatfi, M. Platzner, O. Kermia, and A. Khouas, “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware,”10.1109/ipdpsw.2019.00027__2019, doi:10.1109/ipdpsw.2019.00027 .
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Q. A. Ahmed, T. Wiersema, and M. Platzner, “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan,”10.1007/978-3-030-17227-5_10__in Applied Reconfigurable Computing, Darmstadt, Germany, 2019, vol. 11444, pp. 127–136, doi:10.1007/978-3-030-17227-5_10 .
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

C. Lienen, Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
LibreCat: /record/15874

M. Platzner and C. Plessl, “FPGAs im Rechenzentrum,”10.1007/s00287-019-01187-w__Informatik Spektrum, 2019, doi:10.1007/s00287-019-01187-w .
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

J. D. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip. 2019.
LibreCat: /record/52478

A. Lösch, A. Wiens, and M. Platzner, “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes,” in Proceedings of the International Conference on Architecture of Computing Systems (ARCS), 2018, vol. 10793, pp. 73–84.
LibreCat: /record/3362
DOI: 10.1007/978-3-319-77610-1_6

J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn, 2018.
LibreCat: /record/3365

M. Croce, Evaluation of OpenCL-based Compilation for FPGAs. Universität Paderborn, 2018.
LibreCat: /record/3366

T. Hansmeier, M. Platzner, and D. Andrews, “An FPGA/HMC-Based Accelerator for Resolution Proof Checking,” in ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Santorini, Greece, 2018, vol. 10824, pp. 153–165.
LibreCat: /record/3373
DOI: 10.1007/978-3-319-78890-6_13

L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Third Workshop on Approximate Computing (AxC 2018). .
LibreCat: /record/3586

N. Ho, FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn, 2018.
LibreCat: /record/3720
DOI: 10.17619/UNIPB/1-376

L. M. Witschen, T. Wiersema, and M. Platzner, “Making the Case for Proof-carrying Approximate Circuits,” 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
LibreCat: /record/1165

A. Lösch and M. Platzner, “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes,” in 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018.
LibreCat: /record/5547
DOI: 10.1109/asap.2018.8445098

M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat: /record/10598
DOI: 10.1109/VLSI-SoC.2018.8645026

L. Clausing, Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum, 2018.
LibreCat: /record/10782