Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.

On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach
T. Wiersema, S. Wu, M. Platzner, in: Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.

Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, Universität Paderborn, 2015.

Self-Aware and Self-Expressive Systems – Guest Editor's Introduction
J. Torresen, C. Plessl, X. Yao, IEEE Computer 48 (2015) 18–20.

Self-Optimizing Organic Cache
A.F. Ahmed, Self-Optimizing Organic Cache, Paderborn University, 2015.

Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.

Evolution of Heat Flow Prediction Models for FPGA Devices
H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices, Paderborn University, 2015.

Computer Vision basierte Klassifikation von HD EMG Signalen
C. Haupt, Computer Vision Basierte Klassifikation von HD EMG Signalen, Paderborn University, 2015.

Microarchitectural optimization by means of reconfigurable and evolvable cache mappings
N. Ho, A.F. Ahmed, P. Kaufmann, M. Platzner, in: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.

Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing
P. Kaufmann, C. Shen, in: Genetic and Evolutionary Computation (GECCO), ACM, 2015, pp. 409–416.

Comparison of thread signatures for error detection in hybrid multi-cores
S. Meisner, M. Platzner, in: Field Programmable Technology (FPT), 2015 International Conference On, 2015, pp. 212–215.

Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs
R. Meißner, Konzept Und Implementation Einer Benutzeroberfläche Zur Generierung Virtueller FPGAs, Universität Paderborn, 2015.

Acceleration of Artificial Neural Networks on a Zynq Platform
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform, Paderborn University, 2015.

Applications of Evolutionary Computation - 18th European Conference, EvoApplications
A. M. Mora, G. Squillero, A. Agapitos, P. Burelli, W. S. Bush, S. Cagnoni, C. Cotta, I. De Falco, A. Della Cioppa, F. Divina, A.E. Eiben, A. I. Esparcia-Alc\rquote azar, F. Fern\rquote andez de Vega, K. Glette, E. Haasdijk, J. Ignacio Hidalgo, M. Kampouridis, P. Kaufmann, M. Mavrovouniotis, T. Thanh Nguyen, R. Schaefer, K. Sim, E. Tarantino, N. Urquhart, M. Zhang (editors), Applications of Evolutionary Computation - 18th European Conference, EvoApplications, Springer, Copenhagen, Denmark, 2015.

Significant papers from the first 25 years of the FPL conference
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, in: Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), Imperial College, 2015, pp. 1–3.

New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, G. De Micheli, IEEE Transactions on Nanotechnology 14 (2015) 1117–1126.

On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, M.S. Reorda, in: 2015 IEEE Computer Society Annual Symposium on VLSI, IEEE, 2015, pp. 491–496.

Fault modeling in controllable polarity silicon nanowire circuits
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, G. De Micheli, in: Proceedings of the 2015 Design, Automation &; Test in Europe Conference \'26; Exhibition, EDA Consortium, 2015, pp. 453–458.