Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
C.P. Gatica, M. Platzner, in: Machine Learning for Cyber Physical Systems (ML4CPS 2017), Berlin, Heidelberg, 2020.

Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.

Evolution of Application-Specific Cache Mappings
N. Ho, P. Kaufmann, M. Platzner, International Journal of Hybrid Intelligent Systems (2020).

Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).

ReconROS: Flexible Hardware Acceleration for RO Applications
C. Lienen, M. Platzner, B. Rinner, in: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.

Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.

Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.

An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.

Dynamic Reliability Management for FPGA-Based Systems
J. Anwer, S. Meisner, M. Platzner, International Journal of Reconfigurable Computing (2020) 1–19.

Self-aware Cyber-Physical Systems
K. Bellman, N. Dutt, L. Esterle, A. Herkersdorf, A. Jantsch, C. Landauer, P. R. Lewis, M. Platzner, N. TaheriNejad, K. Tammemäe, ACM Transactions on Cyber-Physical Systems Accepted for Publication (2020) 1–24.

A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.

Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 125–126.

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.

Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.

Zynq-based acceleration of robust high density myoelectric signal processing
A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.

An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
T. Hansmeier, M. Platzner, M.J.H. Pantho, D. Andrews, Journal of Signal Processing Systems 91 (2019) 1259–1272.

Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.