A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm
C. Shen, P. Kaufmann, M. Braun, in: Power Systems Computation Conference (PSCC), IEEE, 2014.
LibreCat: /record/10739

Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat: /record/10744

Applications of Evolutionary Computation - 17th European Conference, EvoApplications
A. I. Esparcia-Alc\rquote azar, A.E. Eiben, A. Agapitos, A. Sim\'7eoes, A. G.B. Tettamanzi, A. Della Cioppa, A. M. Mora, C. Cotta, E. Tarantino, E. Haasdijk, F. Divina, F. Fern\rquote andez de Vega, G. Squillero, I. De Falco, J. Ignacio Hidalgo, K. Sim, K. Glette, M. Zhang, N. Urquhart, P. Burelli, P. Kaufmann, P. Po\'76 s\rquote k, R. Schaefer, R. Drechsler, S. Antipolis, S. Cagnoni, T. Thanh Nguyen, W. S. Bush (editors), Applications of Evolutionary Computation - 17th European Conference, EvoApplications, Springer, Granada, Spain, 2014.
LibreCat: /record/10756

Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs
J. Anwer, M. Platzner, in: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), IEEE, 2014, pp. 177–184.
LibreCat: /record/10764
DOI: 10.1109/DFT.2014.6962108

Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, G. De Micheli, in: 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), IEEE, 2014, pp. 163–168.
LibreCat: /record/10773
DOI: 10.1109/NANOARCH.2014.6880479

Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go
T. Graf, M. Platzner, in: 2014 IEEE Conference on Computational Intelligence and Games, 2014, pp. 1–8.
LibreCat: /record/13154
DOI: 10.1109/CIG.2014.6932863

Verschiebungen an der Grenze zwischen Hardware und Software
M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn, 2014, pp. 123–144.
LibreCat: /record/335

Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer
T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.
LibreCat: /record/388
DOI: 10.1007/978-3-319-05960-0_13

Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
LibreCat: /record/363
DOI: 10.1016/j.micpro.2013.12.001

Reconstructing AES Key Schedules from Decayed Memory with FPGAs
H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.
LibreCat: /record/377
DOI: 10.1109/FCCM.2014.67

Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
LibreCat: /record/365
DOI: 10.1145/2617596

ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
LibreCat: /record/328
DOI: 10.1109/MM.2013.110

Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach
G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.
LibreCat: /record/1778
DOI: 10.1109/ISPA.2014.27

Deferring Accelerator Offloading Decisions to Application Runtime
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat: /record/439
DOI: 10.1109/ReConFig.2014.7032509

Kernel-Centric Acceleration of High Accuracy Stereo-Matching
T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat: /record/406
DOI: 10.1109/ReConFig.2014.7032535

SAVE: Towards efficient resource management in heterogeneous system architectures
G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014.
LibreCat: /record/1780
DOI: 10.1007/978-3-319-05960-0_38

Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers
H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News 41 (2014) 65–70.
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Adapting Hardware Systems by Means of Multi-Objective Evolution
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat: /record/11619

FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm
S. Kasap, S. Redif, in: Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013.
LibreCat: /record/1786
DOI: 10.1109/SIU.2013.6531530

Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices
S. Kasap, S. Redif, IEEE Trans. on Very Large Scale Integration (VLSI) Systems 22 (2013) 522–536.
LibreCat: /record/1792
DOI: 10.1109/TVLSI.2013.2248069

Performance and thermal management on self-adaptive hybrid multi-cores
M. Happe, Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores, Logos Verlag Berlin GmbH, Berlin, 2013.
LibreCat: /record/501

A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking
M. Happe, E. Lübbers, M. Platzner, International Journal of Real-Time Image Processing 8 (2013) 95–110.
LibreCat: /record/10604
DOI: doi:10.1007/s11554-011-0212-y

Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime
J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6.
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner
C. Bick, Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner, Paderborn University, 2013.
LibreCat: /record/10626

Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes
A. Boschmann, B. Nofen, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
LibreCat: /record/10634

Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array
A. Boschmann, M. Platzner, in: Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
LibreCat: /record/10635

Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface
K. Glette, P. Kaufmann, C. Assad, M. Wolf, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2013, pp. 1–1.
LibreCat: /record/10655

Adapting Hardware Systems by Means of Multi-Objective Evolution
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag, Berlin, 2013.
LibreCat: /record/10681

Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE Transactions on Evolutionary Computation 17 (2013) 46–63.
LibreCat: /record/10684
DOI: 10.1109/TEVC.2012.2185845

Behavior Models for Electric Vehicles
M. Knoop, Behavior Models for Electric Vehicles, IWES Kassel, 2013.
LibreCat: /record/10700

Verbesserung der Erkennungsrate eines Systems zur Klassifikation von EMG-Signalen durch den Einsatz eines hybriden Lagesensors
B. Nofen, Verbesserung Der Erkennungsrate Eines Systems Zur Klassifikation von EMG-Signalen Durch Den Einsatz Eines Hybriden Lagesensors, Paderborn University, 2013.
LibreCat: /record/10720

Überquerung der Styx - Betriebsparametervariation und Fehlerverhalten eines Platform FPGAs
D. Pudelko, Überquerung Der Styx - Betriebsparametervariation Und Fehlerverhalten Eines Platform FPGAs, Paderborn University, 2013.
LibreCat: /record/10727

Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
LibreCat: /record/10730

MiBenchHybrid : Erweiterung eines Benchmarks um Hardwarebeschleunigung
A. Sprenger, MiBenchHybridf: Erweiterung Eines Benchmarks Um Hardwarebeschleunigung, Paderborn University, 2013.
LibreCat: /record/10741

Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen
P. Steppeler, Beschleunigung von Einzelbild-Erkennungsverfahren Auf Datenfluss Basierenden HPC Systemen, Paderborn University, 2013.
LibreCat: /record/10743

Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation
C. Toebermann, D. Geibel, M. Hau, R. Brandl, P. Kaufmann, C. Ma, M. Braun, T. Degner, in: Real-Time Conference, OPAL RT Paris, 2013.
LibreCat: /record/10745

A fast TCAD-based methodology for Variation analysis of emerging nano-devices
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88.
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study
P.-E. Gaillardon, H. Ghasemzadeh Mohammadi, G. De Micheli, in: 2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1–6.
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

On Semeai Detection in Monte-Carlo Go.
T. Graf, L. Schäfers, M. Platzner, in: Proceedings of the International Conference on Computers and Games (CG), Springer, 2013.
LibreCat: /record/13645

FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm
S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–140.
LibreCat: /record/2097
DOI: 10.1109/FPT.2012.6412125

FPGA implementation of a second-order convolutive blind signal separation algorithm
S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG), 2012.
LibreCat: /record/2100

Comparison of Bayesian Move Prediction Systems for Computer Go
M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.
LibreCat: /record/2103
DOI: 10.1109/CIG.2012.6374143

STIR: Software for Tomographic Image Reconstruction Release 2
K. Thielemans, C. Tsoumpas, S. Mustafovic, T. Beisel, P. Aguiar, N. Dikaios, M. W Jacobson, Physics in Medicine and Biology 57 (2012) 867–883.
LibreCat: /record/2172
DOI: 10.1088/0031-9155/57/4/867

Parallel algorithm for computation of second-order sequential best rotations
S. Redif, S. Kasap, Int. Journal of Electronics 100 (2012) 1646–1651.
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer
S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.
LibreCat: /record/2174

Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security
S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
LibreCat: /record/586

Programming models for reconfigurable heterogeneous multi-cores
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012.
LibreCat: /record/587