Nofen, B. (2013). Verbesserung der Erkennungsrate eines Systems zur Klassifikation von EMG-Signalen durch den Einsatz eines hybriden Lagesensors. Paderborn University.
LibreCat: /record/10720

Pudelko, D. (2013). Überquerung der Styx - Betriebsparametervariation und Fehlerverhalten eines Platform FPGAs. Paderborn University.
LibreCat: /record/10727

Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.
LibreCat: /record/10730

Sprenger, A. (2013). MiBenchHybridf: Erweiterung eines Benchmarks um Hardwarebeschleunigung. Paderborn University.
LibreCat: /record/10741

Steppeler, P. (2013). Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen. Paderborn University.
LibreCat: /record/10743

Toebermann, C., Geibel, D., Hau, M., Brandl, R., Kaufmann, P., Ma, C.,  Degner, T. (2013). Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation. In Real-Time Conference. OPAL RT Paris.
LibreCat: /record/10745

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Yazdani, M., &; De Micheli, G. (2013). A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) (pp. 83–88). IEEE.https://doi.org/10.1109/DFT.2013.6653587 
LibreCat: /record/10774
DOI: 10.1109/DFT.2013.6653587

Gaillardon, P.-E., Ghasemzadeh Mohammadi, H., &; De Micheli, G. (2013). Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. In 2013 14th Latin American Test Workshop-LATW (pp. 1–6). IEEE.https://doi.org/10.1109/LATW.2013.6562673 
LibreCat: /record/10775
DOI: 10.1109/LATW.2013.6562673

Graf, T., Schäfers, L., &; Platzner, M. (2013). On Semeai Detection in Monte-Carlo Go. In Proceedings of the International Conference on Computers and Games (CG). Springer.
LibreCat: /record/13645

Riebler, H., Kenter, T., Sorge, C., &; Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389.https://doi.org/10.1109/FPT.2013.6718394 
LibreCat: /record/528
DOI: 10.1109/FPT.2013.6718394

Happe, M., Kling, P., Plessl, C., Platzner, M., &; Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS).https://doi.org/10.1109/ISORC.2013.6913232 
LibreCat: /record/505
DOI: 10.1109/ISORC.2013.6913232

Suess, T., Schoenrock, A., Meisner, S., &; Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73.https://doi.org/10.1109/IPDPSW.2013.136 
LibreCat: /record/1787
DOI: 10.1109/IPDPSW.2013.136

Kasap, S., &; Redif, S. (2012). FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 135–140). IEEE Computer Society.https://doi.org/10.1109/FPT.2012.6412125 
LibreCat: /record/2097
DOI: 10.1109/FPT.2012.6412125

Kasap, S., &; Redif, S. (2012). FPGA implementation of a second-order convolutive blind signal separation algorithm. In Int. Architecture and Engineering Symp. (ARCHENG).
LibreCat: /record/2100

Wistuba, M., Schaefers, L., &; Platzner, M. (2012). Comparison of Bayesian Move Prediction Systems for Computer Go. In Proc. IEEE Conf. on Computational Intelligence and Games (CIG) (pp. 91–99). IEEE.https://doi.org/10.1109/CIG.2012.6374143 
LibreCat: /record/2103
DOI: 10.1109/CIG.2012.6374143

Thielemans, K., Tsoumpas, C., Mustafovic, S., Beisel, T., Aguiar, P., Dikaios, N., &; W Jacobson, M. (2012). STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology, 57(4), 867–883.https://doi.org/10.1088/0031-9155/57/4/867 
LibreCat: /record/2172
DOI: 10.1088/0031-9155/57/4/867

Redif, S., &; Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651.https://doi.org/10.1080/00207217.2012.751343 
LibreCat: /record/2173
DOI: 10.1080/00207217.2012.751343

Kasap, S., &; Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.
LibreCat: /record/2174

Drzevitzky, S. (2012). Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security. Universität Paderborn.
LibreCat: /record/586

Plessl, C., Platzner, M., Agne, A., Happe, M., &; Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
LibreCat: /record/587

Boschmann, A., &; Platzner, M. (2012). Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).
LibreCat: /record/10636

Dridger, D. (2012). Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University.
LibreCat: /record/10650

Giefers, H. (2012). Design and Programming of Reconfigurable Mesh based Many-Cores. Berlin: Logos Verlag Berlin GmbH.
LibreCat: /record/10652

Graf, T. (2012). Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go. Paderborn University.
LibreCat: /record/10658

Hangmann, H. (2012). Generating Adjustable Temperature Gradients on modern FPGAs. Paderborn University.
LibreCat: /record/10667

Kaufmann, P., Glette, K., Platzner, M., &; Torresen, J. (2012). Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 17–31.https://doi.org/10.4018/jaras.2012100102 
LibreCat: /record/10685
DOI: 10.4018/jaras.2012100102

Platzner, M., Boschmann, A., &; Kaufmann, P. (2012). Wieder natürlich gehen und greifen (pp. 6–11).
LibreCat: /record/10723

Schmitz, H. (2012). Stereo Matching on a HC-1 Hybrid Core Computer. Paderborn University.
LibreCat: /record/10734

Topmöller, C. (2012). Entwicklung eines Picoblaze Compilers mit dem Gentle Compiler Construction System. Paderborn University.
LibreCat: /record/10747

Wistuba, M. (2012). Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University.
LibreCat: /record/10754

Lewis, P., Platzner, M., &; Yao, X. (2012). An outlook for self-awareness in computing systems. Awareness Magazine.
LibreCat: /record/13462

Meyer, B., Schumacher, J., Plessl, C., &; Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196.https://doi.org/10.1109/FPL.2012.6339370 
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Schumacher, T., Plessl, C., &; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126.https://doi.org/10.1016/j.micpro.2011.04.002 
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Happe, M., Hangmann, H., Agne, A., &; Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416745 
LibreCat: /record/615
DOI: 10.1109/ReConFig.2012.6416745

Kenter, T., Plessl, C., &; Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416773 
LibreCat: /record/591
DOI: 10.1109/ReConFig.2012.6416773

Happe, M., Agne, A., Plessl, C., &; Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.
LibreCat: /record/609

Barrio, P., Carreras, C., Sierra, R., Kenter, T., &; Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565.https://doi.org/10.1109/HPCSim.2012.6266973 
LibreCat: /record/567
DOI: 10.1109/HPCSim.2012.6266973

Rüthing, C., Happe, M., Agne, A., &; Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562.https://doi.org/10.1109/FPL.2012.6339370 
LibreCat: /record/612
DOI: 10.1109/FPL.2012.6339370

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).
LibreCat: /record/2180

Grad, M., &; Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC).https://doi.org/10.1155/2012/418315 
LibreCat: /record/2177
DOI: 10.1155/2012/418315

Kenter, T., Plessl, C., Platzner, M., &; Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
LibreCat: /record/2191

Plessl, C., &; Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui &; H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global.https://doi.org/10.4018/978-1-60960-086-0 
LibreCat: /record/2202
DOI: 10.4018/978-1-60960-086-0

Graf, T., Lorenz, U., Platzner, M., &; Schaefers, L. (2011). Parallel Monte-Carlo Tree Search for HPC Systems. In Proc. European Conf. on Parallel Processing (Euro-Par) (Vol. 6853). Berlin / Heidelberg: Springer.https://doi.org/10.1007/978-3-642-23397-5_36 
LibreCat: /record/2204
DOI: 10.1007/978-3-642-23397-5_36

Drzevitzky, S., &; Platzner, M. (2011). Achieving Hardware Security for Reconû01gurable Systems on Chip by a Proof-Carrying Code Approach. In Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (pp. 58–65).https://doi.org/10.1109/ReCoSoC.2011.5981499 
LibreCat: /record/666
DOI: 10.1109/ReCoSoC.2011.5981499

Boschmann, A., Kaufmann, P., &; Platzner, M. (2011). Accurate gait phase detection using surface electromyographic signals and support vector machines. In Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT).
LibreCat: /record/10637

Boschmann, A., Platzner, M., Robrecht, M., Hahn, M., &; Winkler, M. (2011). Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems. In Proc. MyoElectric Controls Symposium (MEC).
LibreCat: /record/10638

Ikonomakis, N. (2011). PinSim: Schnelle Simulation mit Pintools. Paderborn University.
LibreCat: /record/10678

Kassner, H. (2011). MPI-CUDA Codegenerierung für Nanophoton Simulationen auf Clustern. Paderborn University.
LibreCat: /record/10680

Kaufmann, P., &; Platzner, M. (2011). Multi-objective Intrinsic Evolution of Embedded Systems. In C. Müller-Schloer, H. Schmeck, &; T. Ungerer (Eds.), Organic Computing---A Paradigm Shift for Complex Systems (Vol. 1, pp. 193–206). Springer Basel.
LibreCat: /record/10687

Schwabe, A. (2011). Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University.
LibreCat: /record/10736