A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes
C. Kashikar, A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes, Paderborn University, Paderborn, 2021.
LibreCat: /record/29151

LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32.
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib
J.W. Rehnen, Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib, 2021.
LibreCat: /record/22216

MCTS-Based Synthesis Towards Efficient Approximate Accelerators
M. Awais, M. Platzner, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, IEEE, 2021, pp. 384–389.
LibreCat: /record/22309

Implementation and Profiling of XCS in the Context of Embedded Systems
M. Brede, Implementation and Profiling of XCS in the Context of Embedded Systems, Paderborn University, Paderborn, 2021.
LibreCat: /record/22483

Timing Optimization for Virtual FPGA Configurations
L.M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, M. Platzner, in: F. Hannig, S. Derrien, P. Diniz, D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Springer Lecture Notes in Computer Science, n.d.
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis
A. Boschmann, D. Neuhaus, S. Vogt, C. Kaltschmidt, M. Platzner, S. Dosen, Journal of NeuroEngineering and Rehabilitation 18 (2021).
LibreCat: /record/30906
DOI: 10.1186/s12984-021-00822-6

Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs
A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.
LibreCat: /record/30907
DOI: 10.1109/tc.2021.3107196

Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS
T. Hansmeier, in: HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Association for Computing Machinery (ACM), New York, NY, United States, 2021.
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055

Design and Implementation of a ReconROS-based Obstacle Avoidance System
M.A. Sheikh, Design and Implementation of a ReconROS-Based Obstacle Avoidance System, Paderborn University, 2021.
LibreCat: /record/29540

Design of Distributed Reconfigurable Robotics Systems with ReconROS
C. Lienen, M. Platzner, ArXiv:2107.07208 (2021).
LibreCat: /record/22764

An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2021, pp. 1639–1647.
LibreCat: /record/21813
DOI: 10.1145/3449726.3463159

Software/Hardware Co-Verification for Custom Instruction Set Processors
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, T. Wiersema, IEEE Access (2021).
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

Hardware Trojans in Reconfigurable Computing
Q.A. Ahmed, in: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021.
LibreCat: /record/29138
DOI: 10.1109/vlsi-soc53125.2021.9606974

Malicious Routing: Circumventing Bitstream-level Verification for FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, 2021.
LibreCat: /record/20681
DOI: 10.23919/DATE51398.2021.9474026

ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip
L. Clausing, in: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, 2021.
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics
H. Ghasemzadeh Mohammadi, F. Jentzsch, M. Kuschel, R. Arshad, S. Rautmare, S. Manjunatha, M. Platzner, A. Boschmann, D. Schollbach, in:  Machine Learning and Principles and Practice of Knowledge Discovery in Databases, Springer, 2021.
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27

Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z.  Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
LibreCat: /record/3583

Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
LibreCat: /record/21324

Evaluation of a ReconOS-ROS Combination based on a Video Processing Application
L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application, 2020.
LibreCat: /record/21432

Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
C.P. Gatica, M. Platzner, in: Machine Learning for Cyber Physical Systems (ML4CPS 2017), Berlin, Heidelberg, 2020.
LibreCat: /record/21584
DOI: 10.1007/978-3-662-59084-3_9

Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

Evolution of Application-Specific Cache Mappings
N. Ho, P. Kaufmann, M. Platzner, International Journal of Hybrid Intelligent Systems (2020).
LibreCat: /record/17369

Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).
LibreCat: /record/20748

ReconROS: Flexible Hardware Acceleration for RO Applications
C. Lienen, M. Platzner, B. Rinner, in: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
LibreCat: /record/20750

Implementing Machine Learning Functions as PYNQ FPGA Overlays
S. Thiele, Implementing Machine Learning Functions as PYNQ FPGA Overlays, 2020.
LibreCat: /record/20820

Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
LibreCat: /record/20821

An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.
LibreCat: /record/17063
DOI: 10.1145/3377929.3398106

Dynamic Reliability Management for FPGA-Based Systems
J. Anwer, S. Meisner, M. Platzner, International Journal of Reconfigurable Computing (2020) 1–19.
LibreCat: /record/17092
DOI: 10.1155/2020/2808710

Self-aware Cyber-Physical Systems
K. Bellman, N. Dutt, L. Esterle, A. Herkersdorf, A. Jantsch, C. Landauer, P. R. Lewis, M. Platzner, N. TaheriNejad, K. Tammemäe, ACM Transactions on Cyber-Physical Systems Accepted for Publication (2020) 1–24.
LibreCat: /record/15836

A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.
LibreCat: /record/16213
DOI: 10.1145/3386263.3406952

Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 125–126.
LibreCat: /record/16363
DOI: 10.1145/3377929.3389968

MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.
LibreCat: /record/20838
DOI: 10.1109/ipdpsw50202.2020.00012

Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
LibreCat: /record/21433

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.
LibreCat: /record/3585
DOI: 10.1016/j.microrel.2019.04.003

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
LibreCat: /record/16853

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
LibreCat: /record/10577
DOI: 10.1145/3299874.3317998

Zynq-based acceleration of robust high density myoelectric signal processing
A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.
LibreCat: /record/11950
DOI: 10.1016/j.jpdc.2018.07.004

An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
T. Hansmeier, M. Platzner, M.J.H. Pantho, D. Andrews, Journal of Signal Processing Systems 91 (2019) 1259–1272.
LibreCat: /record/12967
DOI: 10.1007/s11265-018-1435-y

Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
LibreCat: /record/15422

Incremental learning with Support Vector Machine on embedded platforms
S. Kumar Jeyakumar, Incremental Learning with Support Vector Machine on Embedded Platforms, 2019.
LibreCat: /record/15883

A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
LibreCat: /record/15920

FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
LibreCat: /record/14831

Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfc03gurable System-on-Chip
J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfc03gurable System-on-Chip, 2019.
LibreCat: /record/15946

Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
LibreCat: /record/14546

An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware
Z. Guettatfi, M. Platzner, O. Kermia, A. Khouas, in: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019.
LibreCat: /record/31067
DOI: 10.1109/ipdpsw.2019.00027

Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
LibreCat: /record/9913
DOI: 10.1007/978-3-030-17227-5_10

Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
LibreCat: /record/15874

FPGAs im Rechenzentrum
M. Platzner, C. Plessl, Informatik Spektrum (2019).
LibreCat: /record/12871
DOI: 10.1007/s00287-019-01187-w

Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip
J.D. Mehta, Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip, 2019.
LibreCat: /record/52478