Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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Plaks, Toomas P., et al., editors. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat: /record/2222

Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.”10.1109/ASAP.2010.5540798__Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.
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DOI: 10.1109/ASAP.2010.5540798

Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.”10.1109/GLOCOMW.2010.5700341__Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.
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DOI: 10.1109/GLOCOMW.2010.5700341

Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
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Boschmann, Alexander, et al. “Towards Multi-Movement Hand Prostheses: Combining Adaptive Classification with High Precision Sockets.” Proc. Technically Assisted Rehabilitation (TAR), 2009.
LibreCat: /record/10639

Kostin, Alexander. Evolvable Robot Controller. Paderborn University, 2009.
LibreCat: /record/10702

Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.”10.1145/1596532.1596540__ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, 2009, pp. 8:1-8:33, doi:10.1145/1596532.1596540.
LibreCat: /record/10703
DOI: 10.1145/1596532.1596540

Tofall, Martin. Compiler for a Custom Instruction Set CPU. Paderborn University, 2009.
LibreCat: /record/10746

Warkentin, Alexander. Coarse-Grained CGP Model Using Xilinx Virte DSE Functional Units. Paderborn University, 2009.
LibreCat: /record/10749

Wildenhain, Benedikt. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009.
LibreCat: /record/10753

Ghasemzadeh Mohammadi, Hassan, et al. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.”10.1109/PRDC.2009.69__Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–55, doi:10.1109/PRDC.2009.69.
LibreCat: /record/10777
DOI: 10.1109/PRDC.2009.69

Happe, Markus, et al. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
LibreCat: /record/13632

Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
LibreCat: /record/13634

Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
LibreCat: /record/13635

Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
LibreCat: /record/13636

Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
LibreCat: /record/13637

Happe, Markus, et al. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.”10.1109/fpt.2009.5377645__Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009, doi:10.1109/fpt.2009.5377645.
LibreCat: /record/13638
DOI: 10.1109/fpt.2009.5377645

Drzevitzky, Stephanie, et al. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
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Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.”10.1109/FCCM.2009.25__Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
LibreCat: /record/2262

Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the .”10.1109/ReConFig.2009.32__Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.
LibreCat: /record/2261

Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.
LibreCat: /record/2263

Beisel, Tobias, et al. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.”10.1109/NSSMIC.2008.4774198__IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–68, doi:10.1109/NSSMIC.2008.4774198.
LibreCat: /record/2358
DOI: 10.1109/NSSMIC.2008.4774198

Platzner, Marco, et al. “The GOmputer: Accelerating GO with FPGAs.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
LibreCat: /record/2365

Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassiû01kation von EMG-Signalen. Paderborn University, 2008.
LibreCat: /record/10628

Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008.
LibreCat: /record/10641

Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008.
LibreCat: /record/10644

Glette, Kyrre, et al. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
LibreCat: /record/10653

Glette, Kyrre, et al. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 5216, Springer, 2008, pp. 22–33.
LibreCat: /record/10656

Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
LibreCat: /record/10669

Torresen, Jim, et al. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008.
LibreCat: /record/10690

Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–26.
LibreCat: /record/10691

Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008.
LibreCat: /record/10696

Knieper, Tobias, et al. “On Robust Evolution of Digital Hardware.” Biologically Inspired Collaborative Computing (BICC), vol. 268, Springer, 2008, pp. 2313–222.
LibreCat: /record/10698

Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008.
LibreCat: /record/10718

Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008.
LibreCat: /record/10721

Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008.
LibreCat: /record/10751

Ghasemzadeh Mohammadi, Hassan, et al. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.”10.1109/ICM.2008.5393497__2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–47, doi:10.1109/ICM.2008.5393497.
LibreCat: /record/10778
DOI: 10.1109/ICM.2008.5393497

Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
LibreCat: /record/13629

Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
LibreCat: /record/13630

Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.”10.1109/fpl.2008.4629901__Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008, doi:10.1109/fpl.2008.4629901.
LibreCat: /record/13631
DOI: 10.1109/fpl.2008.4629901

Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
LibreCat: /record/2364

Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat: /record/2372

Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.”10.1109/ahs.2007.73__Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–54, doi:10.1109/ahs.2007.73.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73

Beisel, Tobias. Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen. Paderborn University, 2007.
LibreCat: /record/10623

Bergmann, Neil, et al. “Dynamically Reconfigurable Architectures (Editorial).”10.1155/2007/28405__EURASIP Journal on Embedded Systems, vol. 2007, Springer Science+Business Media, 2007, pp. 1–2, doi:10.1155/2007/28405.
LibreCat: /record/10625
DOI: 10.1155/2007/28405

Ceylan, Toni, and Coni Yalcin. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University, 2007.
LibreCat: /record/10643

Danne, Klaus, et al. “Server-Based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware.”10.1049/iet-cdt:20060186__IET Computers Digital Techniques, vol. 1, no. 4, 2007, pp. 295–302, doi:10.1049/iet-cdt:20060186.
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186