IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–278.
LibreCat: /record/2350
DOI: 10.1109/FCCM.2009.25

EvoCaches: Application-specific Adaptation of Cache Mapping
P. Kaufmann, C. Plessl, M. Platzner, in: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 11–18.
LibreCat: /record/2262

Communication Performance Characterization for Reconfigurable Accelerator Design on the 
T. Schumacher, T. Süß, C. Plessl, M. Platzner, in: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, Los Alamitos, CA, USA, 2009, pp. 119–124.
LibreCat: /record/2238
DOI: 10.1109/ReConFig.2009.32

An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure
T. Schumacher, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–344.
LibreCat: /record/2261

Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
M. Grad, C. Plessl, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, USA, 2009, pp. 319–322.
LibreCat: /record/2263

A method for OSEM PET reconstruction on parallel architectures using STIR
T. Beisel, S. Lietsch, K. Thielemans, in: IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–4168.
LibreCat: /record/2358
DOI: 10.1109/NSSMIC.2008.4774198

The GOmputer: Accelerating GO with FPGAs
M. Platzner, S. Döhre, M. Happe, T. Kenter, U. Lorenz, T. Schumacher, A. Send, A. Warkentin, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
LibreCat: /record/2365

Aufbau und experimentelle Bewertung eines Systems zur Langzeitklassiû01kation von EMG-Signalen
A. Boschmann, Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassiû01kation von EMG-Signalen, Paderborn University, 2008.
LibreCat: /record/10628

Selbstoptimierender Cache-Kontroller
D. Breitlauch, Selbstoptimierender Cache-Kontroller, Paderborn University, 2008.
LibreCat: /record/10641

Verteilte Simulation von mobilen Robotern mit EyeSim
T. Ceylan, C. Yalcin, Verteilte Simulation von Mobilen Robotern Mit EyeSim, Paderborn University, 2008.
LibreCat: /record/10644

Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, M. Platzner, in: IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
LibreCat: /record/10653

A Comparison of Evolvable Hardware Architectures for Classification Tasks
K. Glette, J. Torresen, P. Kaufmann, M. Platzner, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2008, pp. 22–33.
LibreCat: /record/10656

Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern
M. Happe, Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern, Paderborn University, 2008.
LibreCat: /record/10669

Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS)
J. Torresen, K. Glette, M. Platzner, P. Kaufmann, (2008).
LibreCat: /record/10690

Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming
P. Kaufmann, M. Platzner, in: Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–1226.
LibreCat: /record/10691

Implementierung und Bewertung des multikriteriellen Optimierungsverfahrens IBEA für den automatisierten Schaltungsentwurf
T. Knieper, Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf, Paderborn University, 2008.
LibreCat: /record/10696

On Robust Evolution of Digital Hardware
T. Knieper, B. Defo, P. Kaufmann, M. Platzner, in: Biologically Inspired Collaborative Computing (BICC), Springer, 2008, pp. 2313–222.
LibreCat: /record/10698

Eine Monitoring- und Debugging-Infrastruktur für hybride HW/SW-Systeme
J. Niklas, Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme, Paderborn University, 2008.
LibreCat: /record/10718

Raytracing on a Custom Instruction Set CPU
M. Östermann, Raytracing on a Custom Instruction Set CPU, Paderborn University, 2008.
LibreCat: /record/10721

Design and Evaluation of MicroBlaze Multi-core Architectures
N. Westerheide, Design and Evaluation of MicroBlaze Multi-Core Architectures, Paderborn University, 2008.
LibreCat: /record/10751

A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic
H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–447.
LibreCat: /record/10778
DOI: 10.1109/ICM.2008.5393497

Realizing Reconfigurable Mesh Algorithms on Softcore Arrays
H. Giefers, M. Platzner, in: Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
LibreCat: /record/13629

Communication and Synchronization in Multithreaded Reconfigurable Computing Systems
E. Lübbers, M. Platzner, in: Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
LibreCat: /record/13630

A portable abstraction layer for hardware threads
E. Lübbers, M. Platzner, in: Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008.
LibreCat: /record/13631
DOI: 10.1109/fpl.2008.4629901

A Hardware Accelerator for k-th Nearest Neighbor Thinning
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–251.
LibreCat: /record/2364

IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers
T. Schumacher, C. Plessl, M. Platzner, in: Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat: /record/2372

MOVES: A Modular Framework for Hardware Evolution
P. Kaufmann, M. Platzner, in: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–454.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73

Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen
T. Beisel, Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen, Paderborn University, 2007.
LibreCat: /record/10623

Dynamically Reconfigurable Architectures (editorial)
N. Bergmann, M. Platzner, J. Teich, EURASIP Journal on Embedded Systems 2007 (2007) 1–2.
LibreCat: /record/10625
DOI: 10.1155/2007/28405

Distributed Simulation of mobile Robots using EyeSim
T. Ceylan, C. Yalcin, Distributed Simulation of Mobile Robots Using EyeSim, Paderborn University, 2007.
LibreCat: /record/10643

Server-based execution of periodic tasks on dynamically reconfigurable hardware
K. Danne, R. Mühlenbernd, M. Platzner, IET Computers Digital Techniques 1 (2007) 295–302.
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization, Paderborn University, 2007.
LibreCat: /record/10647

Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme
S. Döhre, Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme, Paderborn University, 2007.
LibreCat: /record/10648

Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution
P. Kaufmann, M. Platzner, in: Architecture of Computing Systems (ARCS), Springer, 2007, pp. 199–208.
LibreCat: /record/10689

VHDL-Implementierung eines Clustering-Verfahrens für multikriterielle Optimierungsalgorithmen
R. Meiche, VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen, Paderborn University, 2007.
LibreCat: /record/10709

Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS
W. Reisch, Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS, Paderborn University, 2007.
LibreCat: /record/10728

Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem
E. Rethmeier, Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem, Paderborn University, 2007.
LibreCat: /record/10729

Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster
T. Schumacher, E. Lübbers, P. Kaufmann, M. Platzner, in: Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), IOS Press, 2007, pp. 749–756.
LibreCat: /record/10735

A Many-Core Implementation Based on the Reconfigurable Mesh Model
H. Giefers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
LibreCat: /record/13627
DOI: 10.1109/fpl.2007.4380623

ReconOS: An RTOS Supporting Hard-and Software Threads
E. Lübbers, M. Platzner, in: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007.
LibreCat: /record/13628
DOI: 10.1109/fpl.2007.4380686

Optimal Temporal Partitioning based on Slowdown and Retiming
C. Plessl, M. Platzner, L. Thiele, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–348.
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Multi-objective Intrinsic Hardware Evolution
P. Kaufmann, M. Platzner, in: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
LibreCat: /record/10688

FPGA-Implementierung eines server-basierten Schedulers für periodische Hardwaretasks
R. Mühlenbernd, FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks, Paderborn University, 2006.
LibreCat: /record/10716

Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions
K. Danne, R. Mühlenbernd, M. Platzner, in: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
LibreCat: /record/13624

An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices
K. Danne, M. Platzner, in: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
LibreCat: /record/13625

Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware
K. Danne, M. Platzner, in: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
LibreCat: /record/13626

Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

System-level performance evaluation of reconfigurable processors
R. Enzler, C. Plessl, M. Platzner, Microprocessors and Microsystems 29 (2005) 63–73.
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Periodic real-time scheduling for FPGA computers
K. Danne, M. Platzner, in: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
LibreCat: /record/13621
DOI: 10.1109/wises.2005.1438720

Memory-demanding Periodic Real-time Applications on FPGA Computers
K. Danne, M. Platzner, in: Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
LibreCat: /record/13622