Ahmed QA, Wiersema T, Platzner M. Post-configuration Activation of Hardware Trojans in FPGAs. Journal of Hardware and Systems Security. Published online 2024. doi:10.1007/s41635-024-00147-5
LibreCat: /record/52686
DOI: 10.1007/s41635-024-00147-5

Lienen C, Middeke SH, Platzner M. fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. Published online 2023.
LibreCat: /record/43048

Ahmed QA, Awais M, Platzner M. MAAS: Hiding Trojans in Approximate Circuits. In: The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA. ; 2023.
LibreCat: /record/44194

Simon-Mertens F. Effizienzanalyse Leichtgewichtiger Neuronaler Netze Für FPGA-Basierte Modulationsklassifikation.; 2023.
LibreCat: /record/45762

Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA. Paderborn University; 2023.
LibreCat: /record/45917

Yadalam Murali Kumar N. Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University; 2023.
LibreCat: /record/45916

Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA.; 2023.
LibreCat: /record/46075

Lienen C, Nowosad AP, Platzner M. Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms.
LibreCat: /record/46229

Clausing L, Guetattfi Z, Kaufmann P, Lienen C, Platzner M. On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconO. In: Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC). ; 2023.
LibreCat: /record/45913

Hansmeier T. XCS for Self-Awareness in Autonomous Computing Systems.; 2023.
LibreCat: /record/47837

Klassen A. Fast Partial Reconfiguration for ReconO on Xilinx MPSoC Devices.; 2023.
LibreCat: /record/52480

Jentzsch F. Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML. In: 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL). IEEE; 2023. doi:10.1109/fpl60245.2023.00066
LibreCat: /record/53435
DOI: 10.1109/fpl60245.2023.00066

Witschen LM, Wiersema T, Reuter LD, Platzner M. Search Space Characterization for Approximate Logic Synthesis . In: 2022 59th ACM/IEEE Design Automation Conference (DAC).
LibreCat: /record/29945

Witschen LM, Wiersema T, Artmann M, Platzner M. MUSCAT: MUS-based Circuit Approximation Technique. In: Design, Automation and Test in Europe (DATE).
LibreCat: /record/29865

Hansmeier T, Platzner M. Integrating Safety Guarantees into the Learning Classifier System XCS. In: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings. Vol 13224. Lecture Notes in Computer Science. Springer International Publishing; 2022:386-401. doi:10.1007/978-3-031-02462-7_25
LibreCat: /record/30971
DOI: 10.1007/978-3-031-02462-7_25

Clausing L, Platzner M. ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. In: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2022:120-127. doi:10.1109/ipdpsw55747.2022.00029
LibreCat: /record/32855
DOI: 10.1109/ipdpsw55747.2022.00029

Hansmeier T, Brede M, Platzner M. XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. In: GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion. Association for Computing Machinery (ACM); 2022:2071-2079. doi:10.1145/3520304.3533977
LibreCat: /record/33253
DOI: 10.1145/3520304.3533977

Ahmed QA. Hardware Trojans in Reconfigurable Computing.10.17619/UNIPB/1-1271__Paderborn University, Paderborn, Germany; 2022. doi:10.17619/UNIPB/1-1271
LibreCat: /record/29769
DOI: 10.17619/UNIPB/1-1271

Lienen C, Platzner M. ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications. Published online 2022.
LibreCat: /record/29541

Lienen C, Platzner M. Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS.
LibreCat: /record/34007

Lienen C, Platzner M. Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. In: 2022 25th Euromicro Conference on Digital System Design (DSD). doi:10.1109/DSD57027.2022.00088
LibreCat: /record/34005
DOI: 10.1109/DSD57027.2022.00088

Witschen LM. Frameworks and Methodologies for Search-Based Approximate Logic Synthesis.; 2022. doi:10.17619/UNIPB/1-1649
LibreCat: /record/34041
DOI: 10.17619/UNIPB/1-1649

Ahmed QA, Platzner M. On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022); 2022.
LibreCat: /record/32342

Mehlich F. An Evaluation of XCS on the OpenAI Gym. Paderborn University; 2022.
LibreCat: /record/42839

Jentzsch F, Umuroglu Y, Pappalardo A, Blott M, Platzner M. RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro. 2022;42(6):125-133. doi:10.1109/MM.2022.3202091
LibreCat: /record/33990
DOI: 10.1109/MM.2022.3202091

Tcheussi Ngayap VI. FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.; 2022.
LibreCat: /record/45715

Manjunatha S. Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In  Predictive Maintenance. Paderborn University ; 2022.
LibreCat: /record/45914

Kaur  P. Analysis of Time-Series Classification in Conditional Monitoring Systems.; 2022.
LibreCat: /record/45915

Wiersema T. Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University; 2021.
LibreCat: /record/26746

Lienen C, Platzner M. Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems. Published online 2021:1-20. doi:10.1145/3494571
LibreCat: /record/29150
DOI: 10.1145/3494571

Kashikar C. A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University; 2021.
LibreCat: /record/29151

Awais M, Ghasemzadeh Mohammadi H, Platzner M. LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021. ACM; 2021:27-32. doi:https://doi.org/10.1145/3453688.3461506
LibreCat: /record/21610
DOI: https://doi.org/10.1145/3453688.3461506

Rehnen JW. Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.; 2021.
LibreCat: /record/22216

Awais M, Platzner M. MCTS-Based Synthesis Towards Efficient Approximate Accelerators. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI. IEEE; 2021:384-389.
LibreCat: /record/22309

Brede M. Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University; 2021.
LibreCat: /record/22483

Witschen LM, Wiersema T, Raeisi Nafchi M, Bockhorn A, Platzner M. Timing Optimization for Virtual FPGA Configurations. In: Hannig F, Derrien S, Diniz P, Chillet D, eds. Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science. doi:10.1007/978-3-030-79025-7_4
LibreCat: /record/21953
DOI: 10.1007/978-3-030-79025-7_4

Boschmann A, Neuhaus D, Vogt S, Kaltschmidt C, Platzner M, Dosen S. Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation. 2021;18(1). doi:10.1186/s12984-021-00822-6
LibreCat: /record/30906
DOI: 10.1186/s12984-021-00822-6

Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers. Published online 2021:1-1. doi:10.1109/tc.2021.3107196
LibreCat: /record/30907
DOI: 10.1109/tc.2021.3107196

Hansmeier T. Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. In: HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. Association for Computing Machinery (ACM); 2021. doi:10.1145/3468044.3468055
LibreCat: /record/29137
DOI: 10.1145/3468044.3468055

Sheikh MA. Design and Implementation of a ReconROS-Based Obstacle Avoidance System. Paderborn University; 2021.
LibreCat: /record/29540

Lienen C, Platzner M. Design of Distributed Reconfigurable Robotics Systems with ReconROS. arXiv:210707208. Published online 2021.
LibreCat: /record/22764

Hansmeier T, Platzner M. An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. In: GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion. Association for Computing Machinery (ACM); 2021:1639–1647. doi:10.1145/3449726.3463159
LibreCat: /record/21813
DOI: 10.1145/3449726.3463159

Jakobs M-C, Pauck F, Platzner M, Wehrheim H, Wiersema T. Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access. Published online 2021. doi:10.1109/ACCESS.2021.3131213
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

Ahmed QA. Hardware Trojans in Reconfigurable Computing. In: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). ; 2021. doi:10.1109/vlsi-soc53125.2021.9606974
LibreCat: /record/29138
DOI: 10.1109/vlsi-soc53125.2021.9606974

Ahmed QA, Wiersema T, Platzner M. Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. In: 2021 Design, Automation &; Test in Europe Conference &; Exhibition (DATE). 2021 Design, Automation and Test in Europe Conference (DATE); 2021. doi:10.23919/DATE51398.2021.9474026
LibreCat: /record/20681
DOI: 10.23919/DATE51398.2021.9474026

Clausing L. ReconO: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. In: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. ACM; 2021. doi:10.1145/3468044.3468056
LibreCat: /record/30909
DOI: 10.1145/3468044.3468056

Ghasemzadeh Mohammadi H, Jentzsch F, Kuschel M, et al. FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. In: https://doi.org/10.1007/978-3-030-93736-2_27__Machine Learning and Principles and Practice of Knowledge Discovery in Databases. Springer; 2021. doi:https://doi.org/10.1007/978-3-030-93736-2_27
LibreCat: /record/30908
DOI: https://doi.org/10.1007/978-3-030-93736-2_27

Guetttatfi Z, Kaufmann P, Platzner M. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). ; 2020.
LibreCat: /record/3583

Chandrakar K. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.; 2020.
LibreCat: /record/21324

Henke L-S. Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application.; 2020.
LibreCat: /record/21432