Kasap, S., &; Redif, S. (2013). Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 22(3), 522–536.https://doi.org/10.1109/TVLSI.2013.2248069 

Happe, M. (2013). Performance and thermal management on self-adaptive hybrid multi-cores. Berlin: Logos Verlag Berlin GmbH.

Happe, M., Lübbers, E., &; Platzner, M. (2013). A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. International Journal of Real-Time Image Processing, 8(1), 95–110.https://doi.org/doi:10.1007/s11554-011-0212-y 

Anwer, J., Meisner, S., &; Platzner, M. (2013). Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on (pp. 1–6).https://doi.org/10.1109/ReConFig.2013.6732280 

Bick, C. (2013). Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner. Paderborn University.

Boschmann, A., Nofen, B., &; Platzner, M. (2013). Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).

Boschmann, A., &; Platzner, M. (2013). Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array. In Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC).

Glette, K., Kaufmann, P., Assad, C., &; Wolf, M. (2013). Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface. In IEEE Intl. Conf. on Evolvable Systems (ICES) (Vol. 1, pp. 1–1). Springer.

Kaufmann, P. (2013). Adapting Hardware Systems by Means of Multi-Objective Evolution. Berlin: Logos Verlag.

Kaufmann, P., Glette, K., Gruber, T., Platzner, M., Torresen, J., &; Sick, B. (2013). Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Transactions on Evolutionary Computation, 17(1), 46–63.https://doi.org/10.1109/TEVC.2012.2185845 

Knoop, M. (2013). Behavior Models for Electric Vehicles. IWES Kassel.

Nofen, B. (2013). Verbesserung der Erkennungsrate eines Systems zur Klassifikation von EMG-Signalen durch den Einsatz eines hybriden Lagesensors. Paderborn University.

Pudelko, D. (2013). Überquerung der Styx - Betriebsparametervariation und Fehlerverhalten eines Platform FPGAs. Paderborn University.

Riebler, H. (2013). Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University.

Sprenger, A. (2013). MiBenchHybridf: Erweiterung eines Benchmarks um Hardwarebeschleunigung. Paderborn University.

Steppeler, P. (2013). Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen. Paderborn University.

Toebermann, C., Geibel, D., Hau, M., Brandl, R., Kaufmann, P., Ma, C.,  Degner, T. (2013). Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation. In Real-Time Conference. OPAL RT Paris.

Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Yazdani, M., &; De Micheli, G. (2013). A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) (pp. 83–88). IEEE.https://doi.org/10.1109/DFT.2013.6653587 

Gaillardon, P.-E., Ghasemzadeh Mohammadi, H., &; De Micheli, G. (2013). Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. In 2013 14th Latin American Test Workshop-LATW (pp. 1–6). IEEE.https://doi.org/10.1109/LATW.2013.6562673 

Graf, T., Schäfers, L., &; Platzner, M. (2013). On Semeai Detection in Monte-Carlo Go. In Proceedings of the International Conference on Computers and Games (CG). Springer.

Riebler, H., Kenter, T., Sorge, C., &; Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. Proceedings of the International Conference on Field-Programmable Technology (FPT), 386–389.https://doi.org/10.1109/FPT.2013.6718394 

Happe, M., Kling, P., Plessl, C., Platzner, M., &; Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS).https://doi.org/10.1109/ISORC.2013.6913232 

Suess, T., Schoenrock, A., Meisner, S., &; Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), 64–73.https://doi.org/10.1109/IPDPSW.2013.136 

Kasap, S., &; Redif, S. (2012). FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 135–140). IEEE Computer Society.https://doi.org/10.1109/FPT.2012.6412125 

Kasap, S., &; Redif, S. (2012). FPGA implementation of a second-order convolutive blind signal separation algorithm. In Int. Architecture and Engineering Symp. (ARCHENG).

Wistuba, M., Schaefers, L., &; Platzner, M. (2012). Comparison of Bayesian Move Prediction Systems for Computer Go. In Proc. IEEE Conf. on Computational Intelligence and Games (CIG) (pp. 91–99). IEEE.https://doi.org/10.1109/CIG.2012.6374143 

Thielemans, K., Tsoumpas, C., Mustafovic, S., Beisel, T., Aguiar, P., Dikaios, N., &; W Jacobson, M. (2012). STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology, 57(4), 867–883.https://doi.org/10.1088/0031-9155/57/4/867 

Redif, S., &; Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651.https://doi.org/10.1080/00207217.2012.751343 

Kasap, S., &; Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.

Drzevitzky, S. (2012). Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security. Universität Paderborn.

Plessl, C., Platzner, M., Agne, A., Happe, M., &; Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.

Boschmann, A., &; Platzner, M. (2012). Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).

Dridger, D. (2012). Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University.

Giefers, H. (2012). Design and Programming of Reconfigurable Mesh based Many-Cores. Berlin: Logos Verlag Berlin GmbH.

Graf, T. (2012). Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go. Paderborn University.

Hangmann, H. (2012). Generating Adjustable Temperature Gradients on modern FPGAs. Paderborn University.

Kaufmann, P., Glette, K., Platzner, M., &; Torresen, J. (2012). Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 17–31.https://doi.org/10.4018/jaras.2012100102 

Platzner, M., Boschmann, A., &; Kaufmann, P. (2012). Wieder natürlich gehen und greifen (pp. 6–11).

Schmitz, H. (2012). Stereo Matching on a HC-1 Hybrid Core Computer. Paderborn University.

Topmöller, C. (2012). Entwicklung eines Picoblaze Compilers mit dem Gentle Compiler Construction System. Paderborn University.

Wistuba, M. (2012). Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University.

Lewis, P., Platzner, M., &; Yao, X. (2012). An outlook for self-awareness in computing systems. Awareness Magazine.

Meyer, B., Schumacher, J., Plessl, C., &; Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 189–196.https://doi.org/10.1109/FPL.2012.6339370 

Schumacher, T., Plessl, C., &; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126.https://doi.org/10.1016/j.micpro.2011.04.002 

Happe, M., Hangmann, H., Agne, A., &; Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416745 

Kenter, T., Plessl, C., &; Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 1–8.https://doi.org/10.1109/ReConFig.2012.6416773 

Happe, M., Agne, A., Plessl, C., &; Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 8–9.

Barrio, P., Carreras, C., Sierra, R., Kenter, T., &; Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 559–565.https://doi.org/10.1109/HPCSim.2012.6266973 

Rüthing, C., Happe, M., Agne, A., &; Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 559–562.https://doi.org/10.1109/FPL.2012.6339370 

Beisel, T., Wiersema, T., Plessl, C., &; Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS).