Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008.

Knieper, Tobias, Bertrand Defo, Paul Kaufmann, and Marco Platzner. “On Robust Evolution of Digital Hardware.” In Biologically Inspired Collaborative Computing (BICC), 268:2313–222. IFIP International Federation for Information Processing. Springer, 2008.

Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008.

Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008.

Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008.

Ghasemzadeh Mohammadi, Hassan, Hamed Tabkhi, Seyed Ghassem Miremadi, and Alireza Ejlali. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.”https://doi.org/10.1109/ICM.2008.5393497__In 2008 International Conference on Microelectronics, 444–47. IEEE, 2008.https://doi.org/10.1109/ICM.2008.5393497 .

Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS). IEEE, 2008.

Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2008.

Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.”https://doi.org/10.1109/fpl.2008.4629901__In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2008.https://doi.org/10.1109/fpl.2008.4629901 .

Schumacher, Tobias, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, and Marco Platzner. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 245–51. CSREA Press, 2008.

Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” In Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.

Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.”https://doi.org/10.1109/ahs.2007.73__In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 447–54. IEEE, 2007.https://doi.org/10.1109/ahs.2007.73 .

Beisel, Tobias. Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen. Paderborn University, 2007.

Bergmann, Neil, Marco Platzner, and Jürgen Teich. “Dynamically Reconfigurable Architectures (Editorial).”https://doi.org/10.1155/2007/28405__EURASIP Journal on Embedded Systems 2007 (2007): 1–2.https://doi.org/10.1155/2007/28405 .

Ceylan, Toni, and Coni Yalcin. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University, 2007.

Danne, Klaus, Roland Mühlenbernd, and Marco Platzner. “Server-Based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware.”https://doi.org/10.1049/iet-cdt:20060186__IET Computers Digital Techniques 1, no. 4 (2007): 295–302.https://doi.org/10.1049/iet-cdt:20060186 .

Defo, Bertrand. A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University, 2007.

Döhre, Sven. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University, 2007.

Kaufmann, Paul, and Marco Platzner. “Toward Self-Adaptive Embedded Systems: Multi-Objective Hardware Evolution.” In Architecture of Computing Systems (ARCS), 4415:199–208. LNCS. Springer, 2007.

Meiche, Robert. VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen. Paderborn University, 2007.

Reisch, Waldemar. Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS. Paderborn University, 2007.

Rethmeier, Eike. Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem. Paderborn University, 2007.

Schumacher, Tobias, Enno Lübbers, Paul Kaufmann, and Marco Platzner. “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster.” In Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), 15:749–56. Advances in Parallel Computing. IOS Press, 2007.

Giefers, Heiner, and Marco Platzner. “A Many-Core Implementation Based on the Reconfigurable Mesh Model.”https://doi.org/10.1109/fpl.2007.4380623__In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2007.https://doi.org/10.1109/fpl.2007.4380623 .

Lübbers, Enno, and Marco Platzner. “ReconOS: An RTOS Supporting Hard-and Software Threads.”https://doi.org/10.1109/fpl.2007.4380686__In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2007.https://doi.org/10.1109/fpl.2007.4380686 .

Plessl, Christian, Marco Platzner, and Lothar Thiele. “Optimal Temporal Partitioning Based on Slowdown and Retiming.”https://doi.org/10.1109/FPT.2006.270344__In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 345–48. IEEE Computer Society, 2006.https://doi.org/10.1109/FPT.2006.270344 .

Kaufmann, Paul, and Marco Platzner. “Multi-Objective Intrinsic Hardware Evolution.” In Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.

Mühlenbernd, Roland. FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks. Paderborn University, 2006.

Danne, Klaus, Roland Mühlenbernd, and Marco Platzner. “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-Time Conditions.” In Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2006.

Danne, Klaus, and Marco Platzner. “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices.” In In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.

Danne, Klaus, and Marco Platzner. “Partitioned Scheduling of Periodic Real-Time Tasks onto Reconfigurable Hardware.” In Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press, 2006.

Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.”https://doi.org/10.1109/ASAP.2005.69__In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 213–18. IEEE Computer Society, 2005.https://doi.org/10.1109/ASAP.2005.69 .

Enzler, Rolf, Christian Plessl, and Marco Platzner. “System-Level Performance Evaluation of Reconfigurable Processors.”https://doi.org/10.1016/j.micpro.2004.06.004__Microprocessors and Microsystems 29, no. 2–3 (2005): 63–73.https://doi.org/10.1016/j.micpro.2004.06.004 .

Danne, Klaus, and Marco Platzner. “Periodic Real-Time Scheduling for FPGA Computers.”https://doi.org/10.1109/wises.2005.1438720__In Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.https://doi.org/10.1109/wises.2005.1438720 .

Danne, Klaus, and Marco Platzner. “Memory-Demanding Periodic Real-Time Applications on FPGA Computers.” In Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.

Danne, Klaus, and Marco Platzner. “A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.”https://doi.org/10.1109/fpl.2005.1515787__In Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL). IEEE CS Press, 2005.https://doi.org/10.1109/fpl.2005.1515787 .

Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 63–69. CSREA Press, 2004.

Steiger, Christoph, Herbert Walder, and Marco Platzner. “Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks.”https://doi.org/10.1109/tc.2004.99__IEEE Transactions on Computers 53, no. 11 (2004): 1393–1407.https://doi.org/10.1109/tc.2004.99 .

Walder, Herbert, and Marco Platzner. “A Runtime Environment for Reconfigurable Hardware Operating Systems.”https://doi.org/10.1007/978-3-540-30117-2_84__In Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), 831–35. Berlin, Heidelberg: Springer, 2004.https://doi.org/10.1007/978-3-540-30117-2_84 .

Walder, Hebert, Samuel Nobs, and Marco Platzner. “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems.” In Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2004.

Dyer, Matthias, Marco Platzner, and Lothar Thiele. “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine.”https://doi.org/10.1109/fccm.2004.31__In Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE CS Press, 2004.https://doi.org/10.1109/fccm.2004.31 .

Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.”https://doi.org/10.1109/FPT.2003.1275755__In Proc. Int. Conf. on Field Programmable Technology (ICFPT), 252–59. IEEE Computer Society, 2003.https://doi.org/10.1109/FPT.2003.1275755 .

Plessl, Christian, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, and Gerhard Tröster. “The Case for Reconfigurable Hardware in Wearable Computing.”https://doi.org/10.1007/s00779-003-0243-x__Personal and Ubiquitous Computing 7, no. 5 (2003): 299–308.https://doi.org/10.1007/s00779-003-0243-x .

Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.”https://doi.org/10.1023/a:1024443416592__Journal of Supercomputing 26, no. 2 (2003): 109–29.https://doi.org/10.1023/a:1024443416592 .

Enzler, Rolf, Christian Plessl, and Marco Platzner. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.”https://doi.org/10.1007/b12007__In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2778:151–60. Lecture Notes in Computer Science (LNCS). Springer, 2003.https://doi.org/10.1007/b12007 .

Enzler, Rolf, Christian Plessl, and Marco Platzner. “Co-Simulation of a Hybrid Multi-Context Architecture.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 174–80. CSREA Press, 2003.

Walder, Herbert, and Marco Platzner. “Online Scheduling for Block-Partitioned Reconfigurable Devices.”https://doi.org/10.1109/date.2003.1253622__In Proceedings Design, Automation and Test in Europe Conference (DATE), 290–95. IEEE CS Press, 2003.https://doi.org/10.1109/date.2003.1253622 .

Walder, Herbert, Christoph Steiger, and Marco Platzner. “Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.”https://doi.org/10.1109/ipdps.2003.1213329__In Proceedings International Parallel and Distributed Processing Symposium. IEEE CS Press, 2003.https://doi.org/10.1109/ipdps.2003.1213329 .

Walder, Herbert, and Marco Platzner. “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.” In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 284–87. CSREA Press, 2003.

Steiger, Christoph, Herbert Walder, and Marco Platzner. “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices.”https://doi.org/10.1007/978-3-540-45234-8_56__In Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 575–84. Berlin, Heidelberg: Springer, 2003.https://doi.org/10.1007/978-3-540-45234-8_56 .