Ceylan T, Yalcin C. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University; 2007.
LibreCat: /record/10643

Danne K, Mühlenbernd R, Platzner M. Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques. 2007;1(4):295-302. doi:10.1049/iet-cdt:20060186
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

Defo B. A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University; 2007.
LibreCat: /record/10647

Döhre S. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University; 2007.
LibreCat: /record/10648

Kaufmann P, Platzner M. Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. In: Architecture of Computing Systems (ARCS). Vol 4415. LNCS. Springer; 2007:199-208.
LibreCat: /record/10689

Meiche R. VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen. Paderborn University; 2007.
LibreCat: /record/10709

Reisch W. Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS. Paderborn University; 2007.
LibreCat: /record/10728

Rethmeier E. Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem. Paderborn University; 2007.
LibreCat: /record/10729

Schumacher T, Lübbers E, Kaufmann P, Platzner M. Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. In: Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO). Vol 15. Advances in Parallel Computing. IOS Press; 2007:749-756.
LibreCat: /record/10735

Giefers H, Platzner M. A Many-Core Implementation Based on the Reconfigurable Mesh Model. In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2007. doi:10.1109/fpl.2007.4380623
LibreCat: /record/13627
DOI: 10.1109/fpl.2007.4380623

Lübbers E, Platzner M. ReconOS: An RTOS Supporting Hard-and Software Threads. In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2007. doi:10.1109/fpl.2007.4380686
LibreCat: /record/13628
DOI: 10.1109/fpl.2007.4380686

Plessl C, Platzner M, Thiele L. Optimal Temporal Partitioning based on Slowdown and Retiming. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2006:345-348. doi:10.1109/FPT.2006.270344
LibreCat: /record/2401
DOI: 10.1109/FPT.2006.270344

Kaufmann P, Platzner M. Multi-objective Intrinsic Hardware Evolution. In: Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD). ; 2006.
LibreCat: /record/10688

Mühlenbernd R. FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks. Paderborn University; 2006.
LibreCat: /record/10716

Danne K, Mühlenbernd R, Platzner M. Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions. In: Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2006.
LibreCat: /record/13624

Danne K, Platzner M. An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices. In: In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES). ; 2006.
LibreCat: /record/13625

Danne K, Platzner M. Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware. In: Proceedings of the 13th Reconfigurable Architectures Workshop (RAW). IEEE CS Press; 2006.
LibreCat: /record/13626

Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2005:213-218. doi:10.1109/ASAP.2005.69
LibreCat: /record/2411
DOI: 10.1109/ASAP.2005.69

Enzler R, Plessl C, Platzner M. System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems. 2005;29(2-3):63-73. doi:10.1016/j.micpro.2004.06.004
LibreCat: /record/2412
DOI: 10.1016/j.micpro.2004.06.004

Danne K, Platzner M. Periodic real-time scheduling for FPGA computers. In: Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES). ; 2005. doi:10.1109/wises.2005.1438720
LibreCat: /record/13621
DOI: 10.1109/wises.2005.1438720