Q. A. Ahmed, T. Wiersema, and M. Platzner, “Post-configuration Activation of Hardware Trojans in FPGAs,”10.1007/s41635-024-00147-5__Journal of Hardware and Systems Security, 2024, doi:10.1007/s41635-024-00147-5 .
LibreCat: /record/52686
DOI: 10.1007/s41635-024-00147-5

C. Lienen, S. H. Middeke, and M. Platzner, pgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications.” 2023.
LibreCat: /record/43048

Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate Circuits,” presented at the The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA, 2023.
LibreCat: /record/44194

F. Simon-Mertens, Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation. 2023.
LibreCat: /record/45762

M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA. Paderborn University, 2023.
LibreCat: /record/45917

N. Yadalam Murali Kumar, Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University, 2023.
LibreCat: /record/45916

M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA. 2023.
LibreCat: /record/46075

C. Lienen, A. P. Nowosad, and M. Platzner, “Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms.” .
LibreCat: /record/46229

L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, and M. Platzner, “On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconO,” 2023.
LibreCat: /record/45913

T. Hansmeier, XCS for Self-awareness in Autonomous Computing Systems. 2023.
LibreCat: /record/47837

A. Klassen, Fast Partial Reconfiguration for ReconO on Xilinx MPSoC Devices. 2023.
LibreCat: /record/52480

F. Jentzsch, “Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML,”10.1109/fpl60245.2023.00066__2023, doi:10.1109/fpl60245.2023.00066 .
LibreCat: /record/53435
DOI: 10.1109/fpl60245.2023.00066

L. M. Witschen, T. Wiersema, L. D. Reuter, and M. Platzner, “Search Space Characterization for Approximate Logic Synthesis ,” presented at the 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.
LibreCat: /record/29945

L. M. Witschen, T. Wiersema, M. Artmann, and M. Platzner, “MUSCAT: MUS-based Circuit Approximation Technique,” presented at the Design, Automation and Test in Europe (DATE), Online.
LibreCat: /record/29865

T. Hansmeier and M. Platzner, “Integrating Safety Guarantees into the Learning Classifier System XCS,”10.1007/978-3-031-02462-7_25__in Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Madrid, 2022, vol. 13224, pp. 386–401, doi:10.1007/978-3-031-02462-7_25 .
LibreCat: /record/30971
DOI: 10.1007/978-3-031-02462-7_25

L. Clausing and M. Platzner, “ReconO: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support,”10.1109/ipdpsw55747.2022.00029__in 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW),10.1109/ipdpsw55747.2022.00029__Lyon, France, 2022, pp. 120–127, doi:10.1109/ipdpsw55747.2022.00029 .
LibreCat: /record/32855
DOI: 10.1109/ipdpsw55747.2022.00029

T. Hansmeier, M. Brede, and M. Platzner, “XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion,”10.1145/3520304.3533977__in GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Boston, MA, USA, 2022, pp. 2071–2079, doi:10.1145/3520304.3533977 .
LibreCat: /record/33253
DOI: 10.1145/3520304.3533977

Q. A. Ahmed, Hardware Trojans in Reconfigurable Computing. Paderborn:  Paderborn University, Paderborn, Germany, 2022.
LibreCat: /record/29769
DOI: 10.17619/UNIPB/1-1271

C. Lienen and M. Platzner, “ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.” 2022.
LibreCat: /record/29541

C. Lienen and M. Platzner, “Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS,” presented at the 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.
LibreCat: /record/34007