A Distributed Computer Architecture for Fast Qualitative Simulation 
M. Platzner, B. Rinner, R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation , Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998.

Acceleration of satisfiability algorithms by reconfigurable hardware
M. Platzner, G. De Micheli, in: Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , Springer , Berlin, Heidelberg, 1998, pp. 69–78.

A Computer Architecture to Support Qualitative Simulation in Industrial Applications
M. Platzner, B. Rinner, R. Weiss, E &; i Elektrotechnik Und Informationstechnik 114 (1997) 13–18.

Parallel qualitative simulation
M. Platzner, B. Rinner, R. Weiss, Simulation Practice and Theory 5 (1997) 623–638.

Fast Signature Segmentation on a Multi-DSP Architecture
M. Platzner, L. Peters, in: Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997.

Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP
T. Röwekamp, M. Platzner, L. Peters, in: Proceedings of the 8th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1997, pp. 829–833.

A Multi-DSP System with Dynamically Reconfigurable Processors
E. Lind, M. Platzner, B. Rinner, in: Proceedings of the 7th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1996.

Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, J.UCS Journal of Universal Computer Science 12 (1995) 811–820.

A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs
M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , IEEE CS Press, 1995, pp. 311–318.

High-Performance Simulators Based on Multi-TM0
E. Brenner, R. Ginthör-Kalcsics, R. Hranitzky, M. Platzner, B. Rinner, C. Steger, R. Weiss, in: Proceedings of the 5th Annual Texas Instruments TM0 Educators Conference, 1995.

A Special-Purpose Coprocessor for Qualitative Simulation
G. Friedl, M. Platzner, B. Rinner, in: Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, Springer International Publishing, 1995, pp. 695–698.

Parallel Qualitative Simulation
M. Platzner, B. Rinner, R. Weiss, in: Proceedings of the EUROSIM Congress, Elsevier, 1995, pp. 231–236.

Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture
M. Platzner, B. Rinner, in: Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, ISCA, 1995, pp. 494–501.

High-Performance Qualitative Simulation on a Multi-DSP Architecture
M. Platzner, B. Rinner, in: Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

Design and Implementation of Adaptive Digital Filters on a Multi-TM0 System
R. Hranitzky, M. Platzner, in: Proceedings of the 6th International Conference on Signal Processing Applications &; Technology (ICSPAT), 1995.

Experimental Evaluation of Multi-DSP Architectures in High Performance Applications
M. Platzner, C. Steger, R. Weiss, in: Proceedings of the 7th Mediterranean Electrotechnical Conference, IEEE Press, 1994.

Erfahrungen mit einer Multi-Signalprozessorarchitektur (TM0)
M. Platzner, C. Steger, Mikroelektronik (1993).

Performance Measurements on a Multi-DSP Architecture with TM0
M. Platzner, C. Steger, R. Weiss, in: Proceedings of the 4th International Conference on Signal Processing Applications &; Technology (ICSPAT), DSP Associates, 1993.

Experimental Results to Interprocessor Communication in Distributed Transputer-Systems
R. Ginthör, M. Platzner, R. Weiss, in: Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.