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Hellebrand, S., Juergensen, A., &; Wunderlich, H.-J. (1994). Synthesis for Off-line Testability. University of Siegen, Germany.

Hellebrand, S., Juergensen, A., Stroele, A., &; Wunderlich, H.-J. (1994). Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time. University of Siegen, Germany.

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Fröhleke, N., Becker, B., Grotstollen, H., Magaritis, B., &; Vollmer, L. (1994). Analysis and design of isolated high power boost topologies and simulations with quasi-static and quasi-stationary transformer models. Proceedings of 1994 IEEE Industry Applications Society Annual Meeting.https://doi.org/10.1109/ias.1994.377539 

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Hellebrand, S., &; Wunderlich, H.-J. (1994). An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures. ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–116.https://doi.org/10.1109/iccad.1994.629752 

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