Design Space Exploration for Approximate Circuits via Checkpointing and DNN-Based Estimators
M. Awais, H.G. Mohammadi, M. Platzner, IEEE Transactions on Very Large Scale Integration (VLSI) Systems 33 (2025) 2395–2405.

60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design
B. Sadiye, M. Iftekhar, W. Müller, J.C. Scheytt, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2025).

Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.