ROLLED: <u>R</u>acetrack Memory <u>O</u>ptimized <u>L</u>inear <u>L</u>ayout and <u>E</u>fficient <u>D</u>ecomposition of Decision Trees
C. Hakert, A.A. Khan, K.-H. Chen, F. Hameed, J. Castrillon, J.-J. Chen, IEEE Transactions on Computers 72 (2022) 1488–1502.

ROLLED: <u>R</u>acetrack Memory <u>O</u>ptimized <u>L</u>inear <u>L</u>ayout and <u>E</u>fficient <u>D</u>ecomposition of Decision Trees
C. Hakert, A.A. Khan, K.-H. Chen, F. Hameed, J. Castrillon, J.-J. Chen, IEEE Transactions on Computers 72 (2022) 1488–1502.

Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs
A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.

FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors
M. Yayla, S. Buschjager, A. Gupta, J.-J. Chen, J. Henkel, K. Morik, K.-H. Chen, H. Amrouch, IEEE Transactions on Computers 71 (2021) 1681–1695.

FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors
M. Yayla, S. Buschjager, A. Gupta, J.-J. Chen, J. Henkel, K. Morik, K.-H. Chen, H. Amrouch, IEEE Transactions on Computers 71 (2021) 1681–1695.

FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors
M. Yayla, S. Buschjager, A. Gupta, J.-J. Chen, J. Henkel, K. Morik, K.-H. Chen, H. Amrouch, IEEE Transactions on Computers 71 (2021) 1681–1695.