Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed”10.1109/PATMOS.2013.6662171__Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:10.1109/PATMOS.2013.6662171
LibreCat: /record/36919
DOI: 10.1109/PATMOS.2013.6662171

Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware Refinement for TLM2.0-based HW/SW Design. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456965
LibreCat: /record/37040
DOI: 10.1109/DATE.2010.5456965

Zabel H, Müller W. Increased Accuracy through Noise Injection in Abstract RTOS Simulation. In: Proceedings of DATE’09. ; 2009. doi:10.1109/DATE.2009.5090925
LibreCat: /record/37066
DOI: 10.1109/DATE.2009.5090925

Dücker M, Geiger C, Hunstock R, Lehrenfeld G, Müller W. Visual-Textual Prototyping of 4D Scenes. In: Proceedings of the 1997 IEEE Symposium on Visual Languages. ; 1997. doi:10.1109/VL.1997.626601
LibreCat: /record/39505
DOI: 10.1109/VL.1997.626601

Müller W, Lehrenfeld G, Tahedl C. Complete Visual Specification and Animations of Protocols. In: Proceedings of ASP-DAC’95/CHDL’95/VLSI’95 with EDA Technofair. ; 1995. doi:10.1109/ASPDAC.1995.486383
LibreCat: /record/39538
DOI: 10.1109/ASPDAC.1995.486383