@articleBauer_Kenter_Lass_Mazur_Meyer_Nitsche_Riebler_Schade_Schwarz_Winnwa_et al._2024, title=Noctua 2 Supercomputer, volume=9, DOI=10.17815/jlsrf-8-187 , journal=Journal of large-scale research facilities, author=Bauer, Carsten and Kenter, Tobias and Lass, Michael and Mazur, Lukas and Meyer, Marius and Nitsche, Holger and Riebler, Heinrich and Schade, Robert and Schwarz, Michael and Winnwa, Nils and et al., year=2024 

@bookAhmed_2022, place=Paderborn, title=Hardware Trojans in Reconfigurable Computing, DOI=10.17619/UNIPB/1-1271, publisher= Paderborn University, Paderborn, Germany, author=Ahmed, Qazi Arbab, year=2022 

@inproceedingsMeyer_Kenter_Plessl_2020, title=Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite, DOI=10.1109/h2rc51942.2020.00007, booktitle=2020 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (RC), author=Meyer, Marius and Kenter, Tobias and Plessl, Christian, year=2020 

@articleBoschmann_Agne_Thombansen_Witschen_Kraus_Platzner_2019, title=Zynq-based acceleration of robust high density myoelectric signal processing, volume=123, DOI=10.1016/j.jpdc.2018.07.004, journal=Journal of Parallel and Distributed Computing, publisher=Elsevier, author=Boschmann, Alexander and Agne, Andreas and Thombansen, Georg and Witschen, Linus Matthias and Kraus, Florian and Platzner, Marco, year=2019, pages=77–89 

@bookRamaswami_2018, title=Accelerating Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGA, publisher=Universität Paderborn, author=Ramaswami, Arjun, year=2018 

@inproceedingsHo_Ahmed_Kaufmann_Platzner_2015, title=Microarchitectural optimization by means of reconfigurable and evolvable cache mappings, DOI=10.1109/AHS.2015.7231178, booktitle=Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), author=Ho, Nam and Ahmed, Abdullah Fathi and Kaufmann, Paul and Platzner, Marco, year=2015, pages=1–7 

@inproceedingsAnwer_Meisner_Platzner_2013, title=Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime, DOI=10.1109/ReConFig.2013.6732280, booktitle=Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, author=Anwer, Jahanzeb and Meisner, Sebastian and Platzner, Marco, year=2013, pages=1–6 

@articleEnzler_Plessl_Platzner_2005, title=System-level performance evaluation of reconfigurable processors, volume=29, DOI=10.1016/j.micpro.2004.06.004, number=2–3, journal=Microprocessors and Microsystems, publisher=Elsevier, author=Enzler, Rolf and Plessl, Christian and Platzner, Marco, year=2005, pages=63–73 

@inproceedingsPlessl_Platzner_2003, title=TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot, DOI=10.1109/FPT.2003.1275755, booktitle=Proc. Int. Conf. on Field Programmable Technology (ICFPT), publisher=IEEE Computer Society, author=Plessl, Christian and Platzner, Marco, year=2003, pages=252–259 

@inproceedingsEnzler_Plessl_Platzner_2003, series=Lecture Notes in Computer Science (LNCS), title=Virtualizing Hardware with Multi-Context Reconfigurable Arrays, volume=2778, DOI=10.1007/b12007, booktitle=Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), publisher=Springer, author=Enzler, Rolf and Plessl, Christian and Platzner, Marco, year=2003, pages=151–160, collection=Lecture Notes in Computer Science (LNCS)