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Witschen LM, Wiersema T, Platzner M. Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems. 2020;28(9):2084-2088. doi:10.1109/TVLSI.2020.3008061

Jentzsch FP. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn; 2018.

Flake S, Müller W. Past- and Future-Oriented Time-Bound Temporal Properties with OCL. In: Proceedings of SEFM´04. IEEE; 2004. doi:10.1109/SEFM.2004.1347516

Müller W, Dömer R, Gerstlauer A. The Formal Execution Semantics of SpecC. In: Proceedings of the ISS. ; 2002. doi:10.1145/581199.581234 

Flake S, Müller W. Specification of Real-Time Properties for UML Models. In: Proceedings of HICSS-35. ; 2002. doi:10.1109/HICSS.2002.994469

Müller W, Ruf J, Hoffmann DW, Gerlach J, Kropf T, Rosenstiehl W. The Simulation Semantics of SystemC. In: Proceedings of the Design, Automation, and Test in Europe (DATE’01). IEEE; 2001. doi:10.1109/DATE.2001.915002

Börger E, Glässer U, Müller W. A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines. In: Delgado Kloos C, Breuer PT, eds. Semantics of VHDL. Kluwer Academic Publishers; 1995:107-139. doi:10.1007/978-1-4615-2237-9_5