M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,”10.1109/ACCESS.2021.3131213__IEEE Access, 2021, doi:10.1109/ACCESS.2021.3131213 .

L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, pp. 2084–2088, 2020.

Y. Mahmood, A. Meier, and J. Schmidt, “Parameterized complexity of abduction in Schaefer’s framework,”10.1093/logcom/exaa079__Journal of Logic and Computation, vol. 31, no. 1, pp. 266–296, 2020, doi:10.1093/logcom/exaa079 .

F. P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.

N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.

Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.

A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.

Z. Guettatfi, O. Kermia, and A. Khouas, “Over effective hard real-time hardware tasks scheduling and allocation,” in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.

F. Vidor, T. Meyers, and U. Hilleringmann, “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors,”10.3390/electronics4030480__Electronics, vol. 4, no. 3, pp. 480–506, 2015, doi:10.3390/electronics4030480 .

N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.