Amiri, Arman, Madjid Tavana, and Hosein Arman. “An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction.”https://doi.org/10.1016/j.iot.2023.101027__Internet of Things 25 (2024).https://doi.org/10.1016/j.iot.2023.101027 .

Mahmoodi, Ehsan, Masood Fathi, Madjid Tavana, Morteza Ghobakhloo, and Amos H.C. Ng. “Data-Driven Simulation-Based Decision Support System for Resource Allocation in Industry 4.0 and Smart Manufacturing.”https://doi.org/10.1016/j.jmsy.2023.11.019__Journal of Manufacturing Systems 72 (2024): 287–307.https://doi.org/10.1016/j.jmsy.2023.11.019 .

Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Thomas Kühne, and Christian Plessl. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.”https://doi.org/10.1177/10943420231177631__The International Journal of High Performance Computing Applications, 2023.https://doi.org/10.1177/10943420231177631 .

Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Workload-Aware Periodic Interconnect BIST.”https://doi.org/10.1109/mdat.2023.3298849__IEEE Design &;Test, 2023, 1–1.https://doi.org/10.1109/mdat.2023.3298849 .

Tavana, Madjid, Arash Khalili Nasr, Alireza Barati Ahmadabadi, Alireza Shamekhi Amiri, and Hassan Mina. “An Interval Multi-Criteria Decision-Making Model for Evaluating Blockchain-IoT Technology in Supply Chain Networks.”https://doi.org/10.1016/j.iot.2023.100786__Internet of Things 22 (2023).https://doi.org/10.1016/j.iot.2023.100786 .

Ahmed, Qazi Arbab. Hardware Trojans in Reconfigurable Computing. Paderborn:https://doi.org/10.17619/UNIPB/1-1271__Paderborn University, Paderborn, Germany, 2022.https://doi.org/10.17619/UNIPB/1-1271 .

Kontinen, Juha, Arne Meier, and Yasir Mahmood. “A Parameterized View on the Complexity of Dependence and Independence Logic.”https://doi.org/10.1093/logcom/exac070__Journal of Logic and Computation 32, no. 8 (2022): 1624–44.https://doi.org/10.1093/logcom/exac070 .

Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Ole Schütt, Alfio Lazzaro, Hans Pabst, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.”https://doi.org/10.1016/j.parco.2022.102920__Parallel Computing 111 (2022).https://doi.org/10.1016/j.parco.2022.102920 .

Wiersema, Tobias. Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn: Paderborn University, 2021.

Rodriguez, Alfonso, Andres Otero, Marco Platzner, and Eduardo De la Torre. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.”https://doi.org/10.1109/tc.2021.3107196__IEEE Transactions on Computers, 2021, 1–1.https://doi.org/10.1109/tc.2021.3107196 .

Jakobs, Marie-Christine, Felix Pauck, Marco Platzner, Heike Wehrheim, and Tobias Wiersema. “Software/Hardware Co-Verification for Custom Instruction Set Processors.”https://doi.org/10.1109/ACCESS.2021.3131213__IEEE Access, 2021.https://doi.org/10.1109/ACCESS.2021.3131213 .

Witschen, Linus Matthias, Tobias Wiersema, and Marco Platzner. “Proof-Carrying Approximate Circuits.”https://doi.org/10.1109/TVLSI.2020.3008061__IEEE Transactions On Very Large Scale Integration Systems 28, no. 9 (2020): 2084–88.https://doi.org/10.1109/TVLSI.2020.3008061 .

Mahmood, Yasir, Arne Meier, and Johannes Schmidt. “Parameterized Complexity of Abduction in Schaefer’s Framework.”https://doi.org/10.1093/logcom/exaa079__Journal of Logic and Computation 31, no. 1 (2020): 266–96.https://doi.org/10.1093/logcom/exaa079 .

Jentzsch, Felix Paul. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.

Ho, Nam, Paul Kaufmann, and Marco Platzner. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.”https://doi.org/10.1109/FPT.2017.8280144__In 2017 International Conference on Field Programmable Technology (ICFPT), 215–18, 2017.https://doi.org/10.1109/FPT.2017.8280144 .

Guettatfi, Zakarya, Philipp Hübner, Marco Platzner, and Bernhard Rinner. “Computational Self-Awareness as Design Approach for Visual Sensor Nodes.”https://doi.org/10.1109/ReCoSoC.2017.8016147__In 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 1–8, 2017.https://doi.org/10.1109/ReCoSoC.2017.8016147 .

Boschmann, Alexander, Andreas Agne, Linus Matthias Witschen, Georg Thombansen, Florian Kraus, and Marco Platzner. “FPGA-Based Acceleration of High Density Myoelectric Signal Processing.”https://doi.org/10.1109/reconfig.2015.7393312__In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, 2016.https://doi.org/10.1109/reconfig.2015.7393312 .

Guettatfi, Zakarya, Omar Kermia, and Abdelhakim Khouas. “Over Effective Hard Real-Time Hardware Tasks Scheduling and Allocation.”https://doi.org/10.1109/FPL.2015.7293994__In 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College, 2015.https://doi.org/10.1109/FPL.2015.7293994 .

Vidor, Fábio, Thorsten Meyers, and Ulrich Hilleringmann. “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors.”https://doi.org/10.3390/electronics4030480__Electronics 4, no. 3 (2015): 480–506.https://doi.org/10.3390/electronics4030480 .

Ho, Nam, Paul Kaufmann, and Marco Platzner. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.”https://doi.org/10.1109/FPL.2014.6927437__In 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 1–4, 2014.https://doi.org/10.1109/FPL.2014.6927437 .

Alizadeh, Bijan, Payman Behnam, and Somayeh Sadeghi-Kohan. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.”https://doi.org/10.1109/tc.2014.2329687__IEEE Transactions on Computers, 2014, 1–1.https://doi.org/10.1109/tc.2014.2329687 .

Anwer, Jahanzeb, Sebastian Meisner, and Marco Platzner. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.”https://doi.org/10.1109/ReConFig.2013.6732280__In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 1–6, 2013.https://doi.org/10.1109/ReConFig.2013.6732280 .

Xie, Tao , Wolfgang Müller, and Florian Letombe. “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor.”https://doi.org/10.1109/SOCC.2012.6398362__In Proceedings of SO.https://doi.org/10.1109/SOCC.2012.6398362__Niagara Falls, NY, USA : IEEE, 2012.https://doi.org/10.1109/SOCC.2012.6398362 .

Oliveira, Marcio F. S., Henning Zabel, and Wolfgang Müller. “Assertion-Based Verification of RTOS Properties.”https://doi.org/10.1109/DATE.2010.5457130__In Proceedings of DATE’10. Dresden: IEEE, 2010.https://doi.org/10.1109/DATE.2010.5457130 .

Klobedanz, Kay, Christoph Kuznik, Andre Thuy, and Wolfgang Müller. “Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study.”https://doi.org/10.1109/DATE.2010.5457125__In Proceedings of DATE’10, Dresden. Dresden: IEEE, 2010.https://doi.org/10.1109/DATE.2010.5457125 .

Becker, Markus, Giuseppe Di Guglielmo, Franco Fummi, Wolfgang Müller, Graziano Pravadelli, and Tao Xie. “RTOS-Aware Refinement for TLM2.0-Based HW/SW Design.”https://doi.org/10.1109/DATE.2010.5456965__In Proceedings of DATE’10. Dresden: IEEE, 2010.https://doi.org/10.1109/DATE.2010.5456965 .

Müller, Wolfgang, Marcio F. da S. Oliveira, Henning Zabel, and Markus Becker. “Verification of Real-Time Properties for Hardware-Dependant Software.” In Proceedings of HLD. IEEE, 2010.

Ecker, Wolfgang, Wolfgang Müller, and Rainer Dömer. “Hardware-Dependent Software - Introduction and Overview.”https://doi.org/10.1007/978-1-4020-9436-1_1__In Hardware Dependent Software - Principles and Practice, edited by Wolfgang Ecker, Wolfgang Müller, and Rainer Dömer, 1–14. Dordrecht: Springer Verlag, 2009.https://doi.org/10.1007/978-1-4020-9436-1_1 .

Kaufmann, Paul, Christian Plessl, and Marco Platzner. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 11–18. Los Alamitos, CA, USA: IEEE Computer Society, 2009.

Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.”https://doi.org/10.1109/ahs.2007.73__In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 447–54. IEEE, 2007.https://doi.org/10.1109/ahs.2007.73 .

Danne, Klaus, Roland Mühlenbernd, and Marco Platzner. “Server-Based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware.”https://doi.org/10.1049/iet-cdt:20060186__IET Computers Digital Techniques 1, no. 4 (2007): 295–302.https://doi.org/10.1049/iet-cdt:20060186 .

Großmann, Jürgen, and Wolfgang Müller. “A Formal Behavioral Semantics for TestML.”https://doi.org/10.1109/ISoLA.2006.37__In Proc. of ISOLA 06. Paphos, Cyprus, 2006.https://doi.org/10.1109/ISoLA.2006.37 .

Schattkowsky, Tim, Wolfgang Müller, and Achim Rettberg. “A Model-Based Approach for Executable Specification on Reconfigurable Hardware.”https://doi.org/10.1109/DATE.2005.20__In Proceedings of DATE’05. Munich, Germany : IEEE, 2005.https://doi.org/10.1109/DATE.2005.20 .

Schattkowsky, Tim, and Wolfgang Müller. “A UML Virtual Machine for Embedded Systems.” In Proceedings of ISNG 05. Las Vegas, NV, 2005.

Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines for Direct Execution.”https://doi.org/10.1109/VLHCC.2005.64__In Proceedings of VL/HCC 05. Dallas, TX, USA, 2005.https://doi.org/10.1109/VLHCC.2005.64 .

Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 63–69. CSREA Press, 2004.

Goser, K., Ulrich Hilleringmann, U. Rueckert, and K. Schumacher. “VLSI Technologies for Artificial Neural Networks.”https://doi.org/10.1109/40.42985__IEEE Micro 9, no. 6 (2002): 28–44.https://doi.org/10.1109/40.42985 .

Goser, K., Ulrich Hilleringmann, U. Rueckert, and K. Schumacher. “VLSI Technologies for Artificial Neural Networks.”https://doi.org/10.1109/40.42985__IEEE Micro 9, no. 6 (2002): 28–44.https://doi.org/10.1109/40.42985 .

Müller, Wolfgang, Jürgen Ruf, D. W. Hoffmann, Joachim Gerlach, Thomas Kropf, and W. Rosenstiehl. “The Simulation Semantics of SystemC.”https://doi.org/10.1109/DATE.2001.915002__In Proceedings of the Design, Automation, and Test in Europe (DATE’01). Munich, Germany : IEEE, 2001.https://doi.org/10.1109/DATE.2001.915002 .

Dücker, M., Christian Geiger, R. Hunstock, Georg Lehrenfeld, and Wolfgang Müller. “Visual-Textual Prototyping of 4D Scenes.”https://doi.org/10.1109/VL.1997.626601__In Proceedings of the 1997 IEEE Symposium on Visual Languages. Capri, Italy, 1997.https://doi.org/10.1109/VL.1997.626601 .

Griebel, P., Georg Lehrenfeld, Wolfgang Müller, C. Tahedl, and H. Uhr. “Integrating a Constraint Solver into a Real-Time Animation Environment.”https://doi.org/10.1109/VL.1996.545262__In Proceedings of the 1996 IEEE Symposium on Visual Languages. Boulder CO, 1996.https://doi.org/10.1109/VL.1996.545262 .