M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,”10.1109/ACCESS.2021.3131213__IEEE Access, 2021, doi:10.1109/ACCESS.2021.3131213 .
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, pp. 2084–2088, 2020.
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

Y. Mahmood, A. Meier, and J. Schmidt, “Parameterized complexity of abduction in Schaefer’s framework,”10.1093/logcom/exaa079__Journal of Logic and Computation, vol. 31, no. 1, pp. 266–296, 2020, doi:10.1093/logcom/exaa079 .
LibreCat: /record/45845
DOI: 10.1093/logcom/exaa079

F. P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.
LibreCat: /record/1097

N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144

Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
LibreCat: /record/10780
DOI: 10.1109/ReCoSoC.2017.8016147

A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
LibreCat: /record/15873
DOI: 10.1109/reconfig.2015.7393312

Z. Guettatfi, O. Kermia, and A. Khouas, “Over effective hard real-time hardware tasks scheduling and allocation,” in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.
LibreCat: /record/10779
DOI: 10.1109/FPL.2015.7293994

F. Vidor, T. Meyers, and U. Hilleringmann, “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors,”10.3390/electronics4030480__Electronics, vol. 4, no. 3, pp. 480–506, 2015, doi:10.3390/electronics4030480 .
LibreCat: /record/39479
DOI: 10.3390/electronics4030480

N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.
LibreCat: /record/10674
DOI: 10.1109/FPL.2014.6927437

B. Alizadeh, P. Behnam, and S. Sadeghi-Kohan, “A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs,”10.1109/tc.2014.2329687__IEEE Transactions on Computers, pp. 1–1, 2014, doi:10.1109/tc.2014.2329687 .
LibreCat: /record/46266
DOI: 10.1109/tc.2014.2329687

J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

T. Xie, W. Müller, and F. Letombe, “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor,”10.1109/SOCC.2012.6398362__2012, doi:10.1109/SOCC.2012.6398362 .
LibreCat: /record/36994
DOI: 10.1109/SOCC.2012.6398362

M. F. S. Oliveira, H. Zabel, and W. Müller, “Assertion-Based Verification of RTOS Properties,”10.1109/DATE.2010.5457130__presented at the 2010 Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5457130 .
LibreCat: /record/37009
DOI: 10.1109/DATE.2010.5457130

K. Klobedanz, C. Kuznik, A. Thuy, and W. Müller, “Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study,”10.1109/DATE.2010.5457125__presented at the 2010 Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5457125 .
LibreCat: /record/37011
DOI: 10.1109/DATE.2010.5457125

M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, and T. Xie, “RTOS-Aware Refinement for TLM2.0-based HW/SW Design,”10.1109/DATE.2010.5456965__presented at the Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5456965 .
LibreCat: /record/37040
DOI: 10.1109/DATE.2010.5456965

W. Müller, M. F. da S. Oliveira, H. Zabel, and M. Becker, “Verification of Real-Time Properties for Hardware-Dependant Software,” presented at the IEEE International High Level Design Validation and Test Workshop (HLDVT), Anaheim, FL, USA, 2010.
LibreCat: /record/37053

W. Ecker, W. Müller, and R. Dömer, “Hardware-dependent Software - Introduction and Overview,” in Hardware Dependent Software - Principles and Practice, W. Ecker, W. Müller, and R. Dömer, Eds. Dordrecht: Springer Verlag, 2009, pp. 1–14.
LibreCat: /record/33814
DOI: 10.1007/978-1-4020-9436-1_1

P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat: /record/2262

P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73