Jakobs, Marie-Christine, et al. “Software/Hardware Co-Verification for Custom Instruction Set Processors.”10.1109/ACCESS.2021.3131213__IEEE Access, IEEE, 2021, doi:10.1109/ACCESS.2021.3131213.
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

Witschen, Linus Matthias, et al. “Proof-Carrying Approximate Circuits.”10.1109/TVLSI.2020.3008061__IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, IEEE, 2020, pp. 2084–88, doi:10.1109/TVLSI.2020.3008061.
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

Mahmood, Yasir, et al. “Parameterized Complexity of Abduction in Schaefer’s Framework.”10.1093/logcom/exaa079__Journal of Logic and Computation, vol. 31, no. 1, Oxford University Press (OUP), 2020, pp. 266–96, doi:10.1093/logcom/exaa079.
LibreCat: /record/45845
DOI: 10.1093/logcom/exaa079

Jentzsch, Felix Paul. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.
LibreCat: /record/1097

Ho, Nam, et al. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.”10.1109/FPT.2017.8280144__2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–18, doi:10.1109/FPT.2017.8280144.
LibreCat: /record/10676
DOI: 10.1109/FPT.2017.8280144

Guettatfi, Zakarya, et al. “Computational Self-Awareness as Design Approach for Visual Sensor Nodes.”10.1109/ReCoSoC.2017.8016147__12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8, doi:10.1109/ReCoSoC.2017.8016147.
LibreCat: /record/10780
DOI: 10.1109/ReCoSoC.2017.8016147

Boschmann, Alexander, et al. “FPGA-Based Acceleration of High Density Myoelectric Signal Processing.”10.1109/reconfig.2015.7393312__2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016, doi:10.1109/reconfig.2015.7393312.
LibreCat: /record/15873
DOI: 10.1109/reconfig.2015.7393312

Guettatfi, Zakarya, et al. “Over Effective Hard Real-Time Hardware Tasks Scheduling and Allocation.”10.1109/FPL.2015.7293994__25th International Conference on Field Programmable Logic and Applications (FPL), Imperial College, 2015, doi:10.1109/FPL.2015.7293994.
LibreCat: /record/10779
DOI: 10.1109/FPL.2015.7293994

Vidor, Fábio, et al. “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors.”10.3390/electronics4030480__Electronics, vol. 4, no. 3, MDPI AG, 2015, pp. 480–506, doi:10.3390/electronics4030480.
LibreCat: /record/39479
DOI: 10.3390/electronics4030480

Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring on LEON3 Multicore Platforms.”10.1109/FPL.2014.6927437__24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437.
LibreCat: /record/10674
DOI: 10.1109/FPL.2014.6927437

Alizadeh, Bijan, et al. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.”10.1109/tc.2014.2329687__IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers (IEEE), 2014, pp. 1–1, doi:10.1109/tc.2014.2329687.
LibreCat: /record/46266
DOI: 10.1109/tc.2014.2329687

Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.”10.1109/ReConFig.2013.6732280__Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6, doi:10.1109/ReConFig.2013.6732280.
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

Xie, Tao, et al. “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor.”10.1109/SOCC.2012.6398362__Proceedings of SO, IEEE, 2012, doi:10.1109/SOCC.2012.6398362.
LibreCat: /record/36994
DOI: 10.1109/SOCC.2012.6398362

Oliveira, Marcio F. S., et al. “Assertion-Based Verification of RTOS Properties.”10.1109/DATE.2010.5457130__Proceedings of DATE’10, IEEE, 2010, doi:10.1109/DATE.2010.5457130.
LibreCat: /record/37009
DOI: 10.1109/DATE.2010.5457130

Klobedanz, Kay, et al. “Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study.”10.1109/DATE.2010.5457125__Proceedings of DATE’10, Dresden, IEEE, 2010, doi:10.1109/DATE.2010.5457125.
LibreCat: /record/37011
DOI: 10.1109/DATE.2010.5457125

Becker, Markus, et al. “RTOS-Aware Refinement for TLM2.0-Based HW/SW Design.”10.1109/DATE.2010.5456965__Proceedings of DATE’10, IEEE, 2010, doi:10.1109/DATE.2010.5456965.
LibreCat: /record/37040
DOI: 10.1109/DATE.2010.5456965

Müller, Wolfgang, et al. “Verification of Real-Time Properties for Hardware-Dependant Software.” Proceedings of HLD, IEEE, 2010.
LibreCat: /record/37053

Ecker, Wolfgang, et al. “Hardware-Dependent Software - Introduction and Overview.”10.1007/978-1-4020-9436-1_1__Hardware Dependent Software - Principles and Practice, edited by Wolfgang Ecker et al., Springer Verlag, 2009, pp. 1–14, doi:10.1007/978-1-4020-9436-1_1.
LibreCat: /record/33814
DOI: 10.1007/978-1-4020-9436-1_1

Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
LibreCat: /record/2262

Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.”10.1109/ahs.2007.73__Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–54, doi:10.1109/ahs.2007.73.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73