B. Alizadeh, P. Behnam, and S. Sadeghi-Kohan, “A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs,”10.1109/tc.2014.2329687__IEEE Transactions on Computers, pp. 1–1, 2014, doi:10.1109/tc.2014.2329687 .
LibreCat: /record/46266
DOI: 10.1109/tc.2014.2329687

J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.
LibreCat: /record/10620
DOI: 10.1109/ReConFig.2013.6732280

T. Xie, W. Müller, and F. Letombe, “Mutation-Analysis Driven Functional Verification of a Soft Microprocessor,”10.1109/SOCC.2012.6398362__2012, doi:10.1109/SOCC.2012.6398362 .
LibreCat: /record/36994
DOI: 10.1109/SOCC.2012.6398362

M. F. S. Oliveira, H. Zabel, and W. Müller, “Assertion-Based Verification of RTOS Properties,”10.1109/DATE.2010.5457130__presented at the 2010 Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5457130 .
LibreCat: /record/37009
DOI: 10.1109/DATE.2010.5457130

K. Klobedanz, C. Kuznik, A. Thuy, and W. Müller, “Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study,”10.1109/DATE.2010.5457125__presented at the 2010 Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5457125 .
LibreCat: /record/37011
DOI: 10.1109/DATE.2010.5457125

M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, and T. Xie, “RTOS-Aware Refinement for TLM2.0-based HW/SW Design,”10.1109/DATE.2010.5456965__presented at the Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5456965 .
LibreCat: /record/37040
DOI: 10.1109/DATE.2010.5456965

W. Müller, M. F. da S. Oliveira, H. Zabel, and M. Becker, “Verification of Real-Time Properties for Hardware-Dependant Software,” presented at the IEEE International High Level Design Validation and Test Workshop (HLDVT), Anaheim, FL, USA, 2010.
LibreCat: /record/37053

W. Ecker, W. Müller, and R. Dömer, “Hardware-dependent Software - Introduction and Overview,” in Hardware Dependent Software - Principles and Practice, W. Ecker, W. Müller, and R. Dömer, Eds. Dordrecht: Springer Verlag, 2009, pp. 1–14.
LibreCat: /record/33814
DOI: 10.1007/978-1-4020-9436-1_1

P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat: /record/2262

P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
LibreCat: /record/6508
DOI: 10.1109/ahs.2007.73

K. Danne, R. Mühlenbernd, and M. Platzner, “Server-based execution of periodic tasks on dynamically reconfigurable hardware,” IET Computers Digital Techniques, vol. 1, no. 4, pp. 295–302, 2007.
LibreCat: /record/10646
DOI: 10.1049/iet-cdt:20060186

J. Großmann and W. Müller, “A Formal Behavioral Semantics for TestML,”10.1109/ISoLA.2006.37__Paphos, Cyprus, 2006, doi:10.1109/ISoLA.2006.37 .
LibreCat: /record/38107
DOI: 10.1109/ISoLA.2006.37

T. Schattkowsky, W. Müller, and A. Rettberg, “A Model-Based Approach for Executable Specification on Reconfigurable Hardware,”10.1109/DATE.2005.20__2005, doi:10.1109/DATE.2005.20 .
LibreCat: /record/39029
DOI: 10.1109/DATE.2005.20

T. Schattkowsky and W. Müller, “A UML Virtual Machine for Embedded Systems,” 2005.
LibreCat: /record/39030

T. Schattkowsky and W. Müller, “Transformation of UML State Machines for Direct Execution,”10.1109/VLHCC.2005.64__2005, doi:10.1109/VLHCC.2005.64 .
LibreCat: /record/39032
DOI: 10.1109/VLHCC.2005.64

C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
LibreCat: /record/2415

K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,”10.1109/40.42985__IEEE Micro, vol. 9, no. 6, pp. 28–44, 2002, doi:10.1109/40.42985 .
LibreCat: /record/39925
DOI: 10.1109/40.42985

K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,”10.1109/40.42985__IEEE Micro, vol. 9, no. 6, pp. 28–44, 2002, doi:10.1109/40.42985 .
LibreCat: /record/39926
DOI: 10.1109/40.42985

W. Müller, J. Ruf, D. W. Hoffmann, J. Gerlach, T. Kropf, and W. Rosenstiehl, “The Simulation Semantics of SystemC,”10.1109/DATE.2001.915002__presented at the10.1109/DATE.2001.915002__Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, 2001, doi:10.1109/DATE.2001.915002 .
LibreCat: /record/39421
DOI: 10.1109/DATE.2001.915002

M. Dücker, C. Geiger, R. Hunstock, G. Lehrenfeld, and W. Müller, “Visual-Textual Prototyping of 4D Scenes,”10.1109/VL.1997.626601__presented at the 1997 IEEE Symposium on Visual Languages, 1997, doi:10.1109/VL.1997.626601 .
LibreCat: /record/39505
DOI: 10.1109/VL.1997.626601