N. Ho, A. F. Ahmed, P. Kaufmann, and M. Platzner, “Microarchitectural optimization by means of reconfigurable and evolvable cache mappings,” in Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
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Z. Guettatfi, O. Kermia, and A. Khouas, “Over effective hard real-time hardware tasks scheduling and allocation,” in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.
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N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure,” in 2014 IEEE Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.
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J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.
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F. Mischkalla, D. He, and W. Müller, “Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems,”10.1109/DATE.2010.5456990__presented at the 2010 Design, Automation &; Test in Europe Conference &; Exhibition (DATE 2010), Dresden, 2010, doi:10.1109/DATE.2010.5456990 .
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P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
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T. Schattkowsky, W. Müller, and A. Rettberg, “A Model-Based Approach for Executable Specification on Reconfigurable Hardware,”10.1109/DATE.2005.20__2005, doi:10.1109/DATE.2005.20 .
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