Schlueter T, Sievers S, Hartmann-Wendels T. Bank funding stability, pricing strategies and the guidance of depositors. Journal of Banking &; Finance (VHB-JOURQUAL 3 Ranking A). 2015;51:43-61. doi:10.2139/ssrn.2001449
LibreCat: /record/4873
DOI: 10.2139/ssrn.2001449

Giefers H, Plessl C, Förstner J. Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News. 2014;41(5):65-70. doi:10.1145/2641361.2641372
LibreCat: /record/1779
DOI: 10.1145/2641361.2641372

Uhde A, Müller O. External governance outcome and microfinance success. https://doi.org/10.1504/IJMEF.2013.056394__International Journal of Monetary Economics and Finance . 2013;6(2/3):116-149. doi:https://doi.org/10.1504/IJMEF.2013.056394
LibreCat: /record/4398
DOI: https://doi.org/10.1504/IJMEF.2013.056394

Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370
LibreCat: /record/2106
DOI: 10.1109/FPL.2012.6339370

Schumacher T, Plessl C, Platzner M. IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems. 2012;36(2):110-126. doi:10.1016/j.micpro.2011.04.002
LibreCat: /record/2108
DOI: 10.1016/j.micpro.2011.04.002

Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.
LibreCat: /record/2180

Kenter T, Plessl C, Platzner M, Kauschke M. Estimation and Partitioning for CPU-Accelerator Architectures. In: Intel European Research and Innovation Conference. ; 2011.
LibreCat: /record/2191

Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA). ACM; 2011:177-180. doi:10.1145/1950413.1950448
LibreCat: /record/2200
DOI: 10.1145/1950413.1950448

Schumacher T, Süß T, Plessl C, Platzner M. FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int Journal of Recon- figurable Computing (IJRC). Published online 2011. doi:10.1155/2011/760954
LibreCat: /record/2201
DOI: 10.1155/2011/760954

Plessl C, Platzner M. Instance-Specific Accelerators for Minimum Covering. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2001:85-91.
LibreCat: /record/2428