Q. A. Ahmed, Hardware Trojans in Reconfigurable Computing. Paderborn:  Paderborn University, Paderborn, Germany, 2022.
LibreCat: /record/29769
DOI: 10.17619/UNIPB/1-1271

T. Wiersema, Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn: Paderborn University, 2021.
LibreCat: /record/26746

M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,”10.1109/ACCESS.2021.3131213__IEEE Access, 2021, doi:10.1109/ACCESS.2021.3131213 .
LibreCat: /record/27841
DOI: 10.1109/ACCESS.2021.3131213

L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, pp. 2084–2088, 2020.
LibreCat: /record/17358
DOI: 10.1109/TVLSI.2020.3008061

L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” Fourth Workshop on Approximate Computing (AxC 2019). .
LibreCat: /record/16853

F. P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn, 2018.
LibreCat: /record/1097

C. Kuznik, W. Müller, and G. B. Defo, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” presented at the Proceedings of the Electronic System Level Synthesis Conference (ESLSyn), 2014.
LibreCat: /record/36917

B. Koppelmann, B. Messidat, M. Becker, W. Müller, and J. C. Scheytt, “Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU,” 2014.
LibreCat: /record/34585

M. Woehrle, C. Plessl, R. Lim, J. Beutel, and L. Thiele, “EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks,”10.1109/SUTC.2008.24__in IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), 2008, pp. 201–208, doi:10.1109/SUTC.2008.24 .
LibreCat: /record/2370
DOI: 10.1109/SUTC.2008.24

J. Beutel et al., “Automated Wireless Sensor Network Testing,”10.1109/INSS.2007.4297445__in Proc. Int. Conf. Networked Sensing Systems (INSS), 2007, pp. 303–303, doi:10.1109/INSS.2007.4297445 .
LibreCat: /record/2393
DOI: 10.1109/INSS.2007.4297445

S. Flake and W. Müller, “Past- and Future-Oriented Time-Bound Temporal Properties with OCL,”10.1109/SEFM.2004.1347516__presented at the10.1109/SEFM.2004.1347516__Proceedings of the Second International Conference on Software Engineering and Formal Methods, 2004, doi:10.1109/SEFM.2004.1347516 .
LibreCat: /record/39069
DOI: 10.1109/SEFM.2004.1347516

W. Müller, R. Dömer, and A. Gerstlauer, “The Formal Execution Semantics of SpecC,”10.1145/581199.581234 __2002, doi:10.1145/581199.581234  .
LibreCat: /record/39382
DOI: 10.1145/581199.581234 

S. Flake and W. Müller, “Specification of Real-Time Properties for UML Models,”10.1109/HICSS.2002.994469__presented at the Proceedings of the 35th Annual Hawaii International Conference on System Sciences, Big Island, HI, USA , 2002, doi:10.1109/HICSS.2002.994469 .
LibreCat: /record/39403
DOI: 10.1109/HICSS.2002.994469

W. Müller, J. Ruf, D. W. Hoffmann, J. Gerlach, T. Kropf, and W. Rosenstiehl, “The Simulation Semantics of SystemC,”10.1109/DATE.2001.915002__presented at the10.1109/DATE.2001.915002__Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, 2001, doi:10.1109/DATE.2001.915002 .
LibreCat: /record/39421
DOI: 10.1109/DATE.2001.915002

E. Börger, U. Glässer, and W. Müller, “A Formal Definition of an Abstract VHDL’93 Simulator by EA-Machines,” in Semantics of VHDL, C. Delgado Kloos and P. T. Breuer, Eds. Dordrecht: Kluwer Academic Publishers, 1995, pp. 107–139.
LibreCat: /record/34448
DOI: 10.1007/978-1-4615-2237-9_5