Wu, Liang, and J. Christoph Scheytt. “Analysis and Design of a Charge Sampler With 70-GHz 1-DB Bandwidth in 130-Nm SiGe BiCMOS.”10.1109/tcsi.2021.3094428__IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 9, Institute of Electrical and Electronics Engineers (IEEE), 2021, pp. 3668–81, doi:10.1109/tcsi.2021.3094428.
LibreCat: /record/29210
DOI: 10.1109/tcsi.2021.3094428

Wu, Liang. Ultrabreitbandige Sampler in SiGe-BiCMOS-Technologie Für Analog-Digital-Wandler Mit Zeitversetzter Abtastung. 2021.
LibreCat: /record/52664

Wu, Liang, et al. “Above 60 GHz Bandwidth 10 GS/s Sampling Rate Track-and-Hold Amplifier in 130 Nm SiGe BiCMOS Technology.”10.1109/ISCAS45731.2020.9180947__2020 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2020, doi:10.1109/ISCAS45731.2020.9180947.
LibreCat: /record/24021
DOI: 10.1109/ISCAS45731.2020.9180947

Wu, Liang, et al. “GHz Large-Signal Bandwidth Sampler Using Current-Mode Integrate-and-Hold Circuit in 130 Nm SiGe BiCMOS Technology.”10.1109/APMC46564.2019.9038239__Asia-Pacific Microwave Conference (APMC), 2019, doi:10.1109/APMC46564.2019.9038239.
LibreCat: /record/24049
DOI: 10.1109/APMC46564.2019.9038239

Wu, Liang, et al. “A 70 GHz Small-Signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 Nm SiGe BiCMOS Technology.”10.1109/ICECS46596.2019.8965046__26th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2019, doi:10.1109/ICECS46596.2019.8965046.
LibreCat: /record/24052
DOI: 10.1109/ICECS46596.2019.8965046

Wu, Liang, et al. “Analog Fault Simulation Automation at Schematic Level with Random Sampling Techniques.”10.1109/DTIS.2018.8368549__2018 13th International Conference on Design &; Technology of Integrated Systems In Nanoscale Era (DTIS)) , IEEE, 2018, doi:10.1109/DTIS.2018.8368549.
LibreCat: /record/24196
DOI: 10.1109/DTIS.2018.8368549

Scheytt, Christoph, and Liang Wu. Integrier Und HalteSchaltung . 2018.
LibreCat: /record/24198

Wu, Liang, et al. “SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study.” 2nd Workshop on Resiliency in Embedded Electronic Systems (REES), 2017, p. 68.
LibreCat: /record/24223

Abughannam, Saed, et al. “Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study.” Analog 2016 - VDE, 2016.
LibreCat: /record/24263

Müller, Wolfgang, et al. “On the Correlation of HW Faults and SW Errors.” Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014), edited by Daniel Mueller-Gritschneder et al., 2015.
LibreCat: /record/24289