A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing
P. Palomero Bernardo, P. Schmid, O. Bringmann, M. Iftekhar, B. Sadiye, W. Müller, A. Koch, E. Jentsch, A. Sauer, I. Feldner, W. Ecker, in: DATE 24 - Design Automation and Test in Europe, 2024.

 ENHANCED PLL CIRCUIT
M. Iftekhar, J.C. Scheytt, (2023).

A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, C. Scheytt, in: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2023.

A 28-Gb/s 27.2 mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology 
M. Iftekhar, H. Nagaraju, P. Kneuper, B. Sadiye, W. Müller, J.C. Scheytt, in: BCICTS 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2023.

Design and Measurements of a Low-power Low-Date-rate Direct-detection Wireless Receiver with Improved Co-channel Interference Robustness
S. Abughannam, S. Kruse, M. Iftekhar, J.C. Scheytt, in: German Microwave Conference 2022 (GeMiC 2022), Ulm, Germany, 2022.

Reference-less Bang-bang CDR with Enhanced Frequency Acquisition Range Using Static and Modulated Integral Branch Offset Currents
M. Iftekhar, S. Gudyriev, J.C. Scheytt, in: The 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021.

28 Gbps Bang-Bang CDR for 100G PSM4 with Independently Tunable Proportional and Integral Parameters of the Loop Filter in 0.25 µm Photonic BiCMOS Technology
M. Iftekhar, S. Gudyriev, C. Scheytt, in: 2020 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), IEEE, San Antonio, TX, USA, USA, 2020.