S. Hellebrand, S. Sadeghi-Kohan, and H.-J. Wunderlich, “Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle,” in International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, Xi’an, China, p. 1.
LibreCat: /record/52743

A. Stiballe, J. D. Reimer, S. Sadeghi-Kohan, and S. Hellebrand, Modeling Crosstalk-induced Interconnect Delay with Polynomial Regression. Darmstadt, Germany: 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”  (TuZ’24), Feb. 2024, 2024.
LibreCat: /record/50284

M. Ustimova, S. Sadeghi-Kohan, and S. Hellebrand, Crosstalk-Aware Simulation of Interconnects Using Artificial Neural Networks. Darmstadt, Germany: 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”  (TuZ’24), Feb. 2024, 2024.
LibreCat: /record/51799

A. Ghazal, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, On Cryptography Effects on Interconnect Reliability. Erfurt, Germany: 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, 2023.
LibreCat: /record/35204

A. Badran, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Approximate Computing: Balancing Performance, Power, Reliability, and Safety,” 2023.
LibreCat: /record/41875

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication,”10.1109/dsn-w58399.2023.00056__2023, doi:10.1109/dsn-w58399.2023.00056 .
LibreCat: /record/46739
DOI: 10.1109/dsn-w58399.2023.00056

S. Sadeghi-Kohan, J. D. Reimer, S. Hellebrand, and H.-J. Wunderlich, “Optimizing the Streaming of Sensor Data with Approximate Communication,” presented at the IEEE Asian Test Symposium (ATS’23), 2023.
LibreCat: /record/46738

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Workload-Aware Periodic Interconnect BIST,”10.1109/mdat.2023.3298849__IEEE Design &;Test, pp. 1–1, 2023, doi:10.1109/mdat.2023.3298849 .
LibreCat: /record/46264
DOI: 10.1109/mdat.2023.3298849

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Stress-Aware Periodic Test of Interconnects,”10.1007/s10836-021-05979-5__Journal of Electronic Testing, 2022, doi:10.1007/s10836-021-05979-5 .
LibreCat: /record/29351
DOI: 10.1007/s10836-021-05979-5

S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, EM-Aware Interconnect BIST. Online: European Workshop on Silicon Lifecycle Management, March 18, 2022, 2022.
LibreCat: /record/29890

A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” 2020.
LibreCat: /record/19422

S. Sadeghi-Kohan and S. Hellebrand, Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. Ludwigsburg: 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, 2020.
LibreCat: /record/15419

S. Sadeghi-Kohan and S. Hellebrand, “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects,”10.1109/vts48691.2020.9107591__2020, doi:10.1109/vts48691.2020.9107591 .
LibreCat: /record/29200
DOI: 10.1109/vts48691.2020.9107591

R. Rezaeizadeh Rookerd, S. Sadeghi-Kohan, and Z. Navabi, “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture,”10.1145/3194554.3194599__2018, doi:10.1145/3194554.3194599 .
LibreCat: /record/29460
DOI: 10.1145/3194554.3194599

S. Sadeghi-Kohan, A. Vafaei, and Z. Navabi, “Near-Optimal Node Selection Procedure for Aging Monitor Placement,”10.1109/iolts.2018.8474120__2018, doi:10.1109/iolts.2018.8474120 .
LibreCat: /record/29459
DOI: 10.1109/iolts.2018.8474120

S. Sadeghi-Kohan, M. Kamal, and Z. Navabi, “Self-Adjusting Monitor for Measuring Aging Rate and Advancement,”10.1109/tetc.2017.2771441__IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, pp. 627–641, 2017, doi:10.1109/tetc.2017.2771441 .
LibreCat: /record/29462
DOI: 10.1109/tetc.2017.2771441

M. Jenihhin, A. Kamkin, Z. Navabi, and S. Sadeghi-Kohan, “Universal mitigation of NBTI-induced aging by design randomization,”10.1109/ewdts.2016.7807635__2017, doi:10.1109/ewdts.2016.7807635 .
LibreCat: /record/29463
DOI: 10.1109/ewdts.2016.7807635

S. Sadeghi-Kohan, A. Kamran, F. Forooghifar, and Z. Navabi, “Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation,”10.1109/dtis.2015.7127373__2015, doi:10.1109/dtis.2015.7127373 .
LibreCat: /record/29465
DOI: 10.1109/dtis.2015.7127373

S. Sadeghi-Kohan, M. Kamal, J. McNeil, P. Prinetto, and Z. Navabi, “Online self adjusting progressive age monitoring of timing variations,”10.1109/dtis.2015.7127368__2015, doi:10.1109/dtis.2015.7127368 .
LibreCat: /record/29466
DOI: 10.1109/dtis.2015.7127368

B. Alizadeh, P. Behnam, and S. Sadeghi-Kohan, “A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs,”10.1109/tc.2014.2329687__IEEE Transactions on Computers, pp. 1–1, 2014, doi:10.1109/tc.2014.2329687 .
LibreCat: /record/46266
DOI: 10.1109/tc.2014.2329687