A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.

FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.

Enforcing IP Core Connection Properties with Verifiable Security Monitors
F.P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors, Universität Paderborn, 2018.

A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.

Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs
R. Meißner, Konzept Und Implementation Einer Benutzeroberfläche Zur Generierung Virtueller FPGAs, Universität Paderborn, 2015.