Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
LibreCat: /record/3720
DOI: 10.17619/UNIPB/1-376

Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.
LibreCat: /record/3580

Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
LibreCat: /record/1157

Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.
LibreCat: /record/74

Knorr C. Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten. Universität Paderborn; 2015.
LibreCat: /record/3364

Koch B. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
LibreCat: /record/10701

Schäfers L. Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH; 2014.
LibreCat: /record/10733

Surmund S. Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
LibreCat: /record/10744

Kaufmann P. Adapting Hardware Systems by Means of Multi-Objective Evolution. Berlin: Logos Verlag Berlin GmbH; 2013.
LibreCat: /record/11619

Happe M. Performance and Thermal Management on Self-Adaptive Hybrid Multi-Cores. Berlin: Logos Verlag Berlin GmbH; 2013.
LibreCat: /record/501