---
_id: '13006'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Alexander
  full_name: A. Ivaniuk, Alexander
  last_name: A. Ivaniuk
- first_name: Yuri
  full_name: V. Klimets, Yuri
  last_name: V. Klimets
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
citation:
  ama: 'Hellebrand S, Wunderlich H-J, A. Ivaniuk A, V. Klimets Y, N. Yarmolik V. Error
    Detecting Refreshment for Embedded DRAMs. In: <i>17th IEEE VLSI Test Symposium
    (VTS’99)</i>. IEEE; 1999:384-390. doi:<a href="https://doi.org/10.1109/vtest.1999.766693">10.1109/vtest.1999.766693</a>'
  apa: Hellebrand, S., Wunderlich, H.-J., A. Ivaniuk, A., V. Klimets, Y., &#38; N.
    Yarmolik, V. (1999). Error Detecting Refreshment for Embedded DRAMs. <i>17th IEEE
    VLSI Test Symposium (VTS’99)</i>, 384–390. <a href="https://doi.org/10.1109/vtest.1999.766693">https://doi.org/10.1109/vtest.1999.766693</a>
  bibtex: '@inproceedings{Hellebrand_Wunderlich_A. Ivaniuk_V. Klimets_N. Yarmolik_1999,
    place={Dana Point, CA, USA}, title={Error Detecting Refreshment for Embedded DRAMs},
    DOI={<a href="https://doi.org/10.1109/vtest.1999.766693">10.1109/vtest.1999.766693</a>},
    booktitle={17th IEEE VLSI Test Symposium (VTS’99)}, publisher={IEEE}, author={Hellebrand,
    Sybille and Wunderlich, Hans-Joachim and A. Ivaniuk, Alexander and V. Klimets,
    Yuri and N. Yarmolik, Vyacheslav}, year={1999}, pages={384–390} }'
  chicago: 'Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri
    V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded
    DRAMs.” In <i>17th IEEE VLSI Test Symposium (VTS’99)</i>, 384–90. Dana Point,
    CA, USA: IEEE, 1999. <a href="https://doi.org/10.1109/vtest.1999.766693">https://doi.org/10.1109/vtest.1999.766693</a>.'
  ieee: 'S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, and V. N.
    Yarmolik, “Error Detecting Refreshment for Embedded DRAMs,” in <i>17th IEEE VLSI
    Test Symposium (VTS’99)</i>, 1999, pp. 384–390, doi: <a href="https://doi.org/10.1109/vtest.1999.766693">10.1109/vtest.1999.766693</a>.'
  mla: Hellebrand, Sybille, et al. “Error Detecting Refreshment for Embedded DRAMs.”
    <i>17th IEEE VLSI Test Symposium (VTS’99)</i>, IEEE, 1999, pp. 384–90, doi:<a
    href="https://doi.org/10.1109/vtest.1999.766693">10.1109/vtest.1999.766693</a>.
  short: 'S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, V. N. Yarmolik,
    in: 17th IEEE VLSI Test Symposium (VTS’99), IEEE, Dana Point, CA, USA, 1999, pp.
    384–390.'
date_created: 2019-08-28T10:24:39Z
date_updated: 2022-05-11T16:48:03Z
department:
- _id: '48'
doi: 10.1109/vtest.1999.766693
extern: '1'
language:
- iso: eng
page: 384-390
place: Dana Point, CA, USA
publication: 17th IEEE VLSI Test Symposium (VTS'99)
publisher: IEEE
status: public
title: Error Detecting Refreshment for Embedded DRAMs
type: conference
user_id: '209'
year: '1999'
...
---
_id: '13066'
author:
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
- first_name: Iuri
  full_name: V. Bykov, Iuri
  last_name: V. Bykov
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: 'N. Yarmolik V, V. Bykov I, Hellebrand S, Wunderlich H-J. Transparent Word-Oriented
    Memory BIST Based on Symmetric March Algorithms. In: <i>Third European Dependable
    Computing Conference (EDCC-3)</i>. ; 1999.'
  apa: N. Yarmolik, V., V. Bykov, I., Hellebrand, S., &#38; Wunderlich, H.-J. (1999).
    Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. <i>Third
    European Dependable Computing Conference (EDCC-3)</i>.
  bibtex: '@inproceedings{N. Yarmolik_V. Bykov_Hellebrand_Wunderlich_1999, place={Prague,
    Czech Republic}, title={Transparent Word-Oriented Memory BIST Based on Symmetric
    March Algorithms}, booktitle={Third European Dependable Computing Conference (EDCC-3)},
    author={N. Yarmolik, Vyacheslav and V. Bykov, Iuri and Hellebrand, Sybille and
    Wunderlich, Hans-Joachim}, year={1999} }'
  chicago: N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim
    Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.”
    In <i>Third European Dependable Computing Conference (EDCC-3)</i>. Prague, Czech
    Republic, 1999.
  ieee: V. N. Yarmolik, I. V. Bykov, S. Hellebrand, and H.-J. Wunderlich, “Transparent
    Word-Oriented Memory BIST Based on Symmetric March Algorithms,” 1999.
  mla: N. Yarmolik, Vyacheslav, et al. “Transparent Word-Oriented Memory BIST Based
    on Symmetric March Algorithms.” <i>Third European Dependable Computing Conference
    (EDCC-3)</i>, 1999.
  short: 'V. N. Yarmolik, I. V. Bykov, S. Hellebrand, H.-J. Wunderlich, in: Third
    European Dependable Computing Conference (EDCC-3), Prague, Czech Republic, 1999.'
date_created: 2019-08-28T11:56:33Z
date_updated: 2022-05-11T16:48:40Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
place: Prague, Czech Republic
publication: Third European Dependable Computing Conference (EDCC-3)
status: public
title: Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms
type: conference
user_id: '209'
year: '1999'
...
---
_id: '13067'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
citation:
  ama: 'Hellebrand S, Wunderlich H-J, N. Yarmolik V. Symmetric Transparent BIST for
    RAMs. In: <i>Design Automation and Test in Europe (DATE’99)</i>. ; 1999:702-707.'
  apa: Hellebrand, S., Wunderlich, H.-J., &#38; N. Yarmolik, V. (1999). Symmetric
    Transparent BIST for RAMs. <i>Design Automation and Test in Europe (DATE’99)</i>,
    702–707.
  bibtex: '@inproceedings{Hellebrand_Wunderlich_N. Yarmolik_1999, place={Munich, Germany},
    title={Symmetric Transparent BIST for RAMs}, booktitle={Design Automation and
    Test in Europe (DATE’99)}, author={Hellebrand, Sybille and Wunderlich, Hans-Joachim
    and N. Yarmolik, Vyacheslav}, year={1999}, pages={702–707} }'
  chicago: Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik.
    “Symmetric Transparent BIST for RAMs.” In <i>Design Automation and Test in Europe
    (DATE’99)</i>, 702–7. Munich, Germany, 1999.
  ieee: S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Symmetric Transparent
    BIST for RAMs,” in <i>Design Automation and Test in Europe (DATE’99)</i>, 1999,
    pp. 702–707.
  mla: Hellebrand, Sybille, et al. “Symmetric Transparent BIST for RAMs.” <i>Design
    Automation and Test in Europe (DATE’99)</i>, 1999, pp. 702–07.
  short: 'S. Hellebrand, H.-J. Wunderlich, V. N. Yarmolik, in: Design Automation and
    Test in Europe (DATE’99), Munich, Germany, 1999, pp. 702–707.'
date_created: 2019-08-28T11:56:34Z
date_updated: 2022-05-11T16:49:35Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
page: 702-707
place: Munich, Germany
publication: Design Automation and Test in Europe (DATE'99)
status: public
title: Symmetric Transparent BIST for RAMs
type: conference
user_id: '209'
year: '1999'
...
---
_id: '13029'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: Hellebrand S, Wunderlich H-J. <i>Test Und Synthese Schneller Eingebetteter
    Systeme</i>. Universität Stuttgart; 1998.
  apa: Hellebrand, S., &#38; Wunderlich, H.-J. (1998). <i>Test und Synthese schneller
    eingebetteter Systeme</i>. Universität Stuttgart.
  bibtex: '@book{Hellebrand_Wunderlich_1998, place={Universität Stuttgart}, title={Test
    und Synthese schneller eingebetteter Systeme}, author={Hellebrand, Sybille and
    Wunderlich, Hans-Joachim}, year={1998} }'
  chicago: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Test Und Synthese
    Schneller Eingebetteter Systeme</i>. Universität Stuttgart, 1998.
  ieee: S. Hellebrand and H.-J. Wunderlich, <i>Test und Synthese schneller eingebetteter
    Systeme</i>. Universität Stuttgart, 1998.
  mla: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Test Und Synthese Schneller
    Eingebetteter Systeme</i>. 1998.
  short: S. Hellebrand, H.-J. Wunderlich, Test Und Synthese Schneller Eingebetteter
    Systeme, Universität Stuttgart, 1998.
date_created: 2019-08-28T10:32:27Z
date_updated: 2022-01-06T06:51:27Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
place: Universität Stuttgart
status: public
title: Test und Synthese schneller eingebetteter Systeme
type: report
user_id: '659'
year: '1998'
...
---
_id: '13091'
author:
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: N. Yarmolik V, Hellebrand S, Wunderlich H-J. <i>Efficient Consistency Checking
    for Embedded Memories</i>. 5th IEEE International Test Synthesis Workshop, Santa
    Barbara, CA, USA; 1998.
  apa: N. Yarmolik, V., Hellebrand, S., &#38; Wunderlich, H.-J. (1998). <i>Efficient
    Consistency Checking for Embedded Memories</i>. 5th IEEE International Test Synthesis
    Workshop, Santa Barbara, CA, USA.
  bibtex: '@book{N. Yarmolik_Hellebrand_Wunderlich_1998, place={5th IEEE International
    Test Synthesis Workshop, Santa Barbara, CA, USA}, title={Efficient Consistency
    Checking for Embedded Memories}, author={N. Yarmolik, Vyacheslav and Hellebrand,
    Sybille and Wunderlich, Hans-Joachim}, year={1998} }'
  chicago: N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich.
    <i>Efficient Consistency Checking for Embedded Memories</i>. 5th IEEE International
    Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.
  ieee: V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, <i>Efficient Consistency
    Checking for Embedded Memories</i>. 5th IEEE International Test Synthesis Workshop,
    Santa Barbara, CA, USA, 1998.
  mla: N. Yarmolik, Vyacheslav, et al. <i>Efficient Consistency Checking for Embedded
    Memories</i>. 1998.
  short: V. N. Yarmolik, S. Hellebrand, H.-J. Wunderlich, Efficient Consistency Checking
    for Embedded Memories, 5th IEEE International Test Synthesis Workshop, Santa Barbara,
    CA, USA, 1998.
date_created: 2019-08-28T12:16:04Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA
status: public
title: Efficient Consistency Checking for Embedded Memories
type: misc
user_id: '659'
year: '1998'
...
---
_id: '13092'
author:
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: N. Yarmolik V, Hellebrand S, Wunderlich H-J. <i>Efficient Consistency Checking
    for Embedded Memories</i>. 10th GI/ITG/GMM/IEEE Workshop; 1998.
  apa: N. Yarmolik, V., Hellebrand, S., &#38; Wunderlich, H.-J. (1998). <i>Efficient
    Consistency Checking for Embedded Memories</i>. 10th GI/ITG/GMM/IEEE Workshop.
  bibtex: '@book{N. Yarmolik_Hellebrand_Wunderlich_1998, place={10th GI/ITG/GMM/IEEE
    Workshop}, title={Efficient Consistency Checking for Embedded Memories}, author={N.
    Yarmolik, Vyacheslav and Hellebrand, Sybille and Wunderlich, Hans-Joachim}, year={1998}
    }'
  chicago: N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich.
    <i>Efficient Consistency Checking for Embedded Memories</i>. 10th GI/ITG/GMM/IEEE
    Workshop, 1998.
  ieee: V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, <i>Efficient Consistency
    Checking for Embedded Memories</i>. 10th GI/ITG/GMM/IEEE Workshop, 1998.
  mla: N. Yarmolik, Vyacheslav, et al. <i>Efficient Consistency Checking for Embedded
    Memories</i>. 1998.
  short: V. N. Yarmolik, S. Hellebrand, H.-J. Wunderlich, Efficient Consistency Checking
    for Embedded Memories, 10th GI/ITG/GMM/IEEE Workshop, 1998.
date_created: 2019-08-28T12:16:34Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 10th GI/ITG/GMM/IEEE Workshop
status: public
title: Efficient Consistency Checking for Embedded Memories
type: misc
user_id: '659'
year: '1998'
...
---
_id: '13060'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
citation:
  ama: 'Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors.
    In: <i>Mixed-Mode BIST Using Embedded Processors</i>. 5. Kluwer Academic Publishers;
    1998.'
  apa: Hellebrand, S., Wunderlich, H.-J., &#38; Hertwig, A. (1998). Mixed-Mode BIST
    Using Embedded Processors. In <i>Mixed-Mode BIST Using Embedded Processors</i>.
    Kluwer Academic Publishers.
  bibtex: '@inbook{Hellebrand_Wunderlich_Hertwig_1998, place={In: M. Nicolaidis, Y.
    Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic
    Publishers 1998}, series={5}, title={Mixed-Mode BIST Using Embedded Processors},
    booktitle={Mixed-Mode BIST Using Embedded Processors}, publisher={Kluwer Academic
    Publishers}, author={Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig,
    Andre}, year={1998}, collection={5} }'
  chicago: 'Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode
    BIST Using Embedded Processors.” In <i>Mixed-Mode BIST Using Embedded Processors</i>.
    5. In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI,
    Boston: Kluwer Academic Publishers 1998: Kluwer Academic Publishers, 1998.'
  ieee: 'S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded
    Processors,” in <i>Mixed-Mode BIST Using Embedded Processors</i>, In: M. Nicolaidis,
    Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic
    Publishers 1998: Kluwer Academic Publishers, 1998.'
  mla: Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” <i>Mixed-Mode
    BIST Using Embedded Processors</i>, Kluwer Academic Publishers, 1998.
  short: 'S. Hellebrand, H.-J. Wunderlich, A. Hertwig, in: Mixed-Mode BIST Using Embedded
    Processors, Kluwer Academic Publishers, In: M. Nicolaidis, Y. Zorian, D. K. Pradhan
    (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998, 1998.'
date_created: 2019-08-28T11:50:39Z
date_updated: 2022-04-01T15:50:42Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
place: 'In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI,
  Boston: Kluwer Academic Publishers 1998'
publication: Mixed-Mode BIST Using Embedded Processors
publisher: Kluwer Academic Publishers
series_title: '5'
status: public
title: Mixed-Mode BIST Using Embedded Processors
type: book_chapter
user_id: '209'
year: '1998'
...
---
_id: '13061'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
citation:
  ama: Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors.
    <i>Journal of Electronic Testing Theory and Applications - JETTA</i>. 1998;12(1/2):127-138.
  apa: Hellebrand, S., Wunderlich, H.-J., &#38; Hertwig, A. (1998). Mixed-Mode BIST
    Using Embedded Processors. <i>Journal of Electronic Testing Theory and Applications
    - JETTA</i>, <i>12</i>(1/2), 127–138.
  bibtex: '@article{Hellebrand_Wunderlich_Hertwig_1998, title={Mixed-Mode BIST Using
    Embedded Processors}, volume={12}, number={1/2}, journal={Journal of Electronic
    Testing Theory and Applications - JETTA}, author={Hellebrand, Sybille and Wunderlich,
    Hans-Joachim and Hertwig, Andre}, year={1998}, pages={127–138} }'
  chicago: 'Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode
    BIST Using Embedded Processors.” <i>Journal of Electronic Testing Theory and Applications
    - JETTA</i> 12, no. 1/2 (1998): 127–38.'
  ieee: S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded
    Processors,” <i>Journal of Electronic Testing Theory and Applications - JETTA</i>,
    vol. 12, no. 1/2, pp. 127–138, 1998.
  mla: Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” <i>Journal
    of Electronic Testing Theory and Applications - JETTA</i>, vol. 12, no. 1/2, 1998,
    pp. 127–38.
  short: S. Hellebrand, H.-J. Wunderlich, A. Hertwig, Journal of Electronic Testing
    Theory and Applications - JETTA 12 (1998) 127–138.
date_created: 2019-08-28T11:54:27Z
date_updated: 2022-04-01T15:51:56Z
department:
- _id: '48'
extern: '1'
intvolume: '        12'
issue: 1/2
language:
- iso: eng
page: 127-138
publication: Journal of Electronic Testing Theory and Applications - JETTA
status: public
title: Mixed-Mode BIST Using Embedded Processors
type: journal_article
user_id: '209'
volume: 12
year: '1998'
...
---
_id: '13064'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: Hellebrand S, Hertwig A, Wunderlich H-J. Synthesis of Fast On-Line Testable
    Controllers for Data-Dominated Applications. <i>IEEE Design and Test</i>. 1998;15(4):36-41.
  apa: Hellebrand, S., Hertwig, A., &#38; Wunderlich, H.-J. (1998). Synthesis of Fast
    On-Line Testable Controllers for Data-Dominated Applications. <i>IEEE Design and
    Test</i>, <i>15</i>(4), 36–41.
  bibtex: '@article{Hellebrand_Hertwig_Wunderlich_1998, title={Synthesis of Fast On-Line
    Testable Controllers for Data-Dominated Applications}, volume={15}, number={4},
    journal={IEEE Design and Test}, publisher={IEEE}, author={Hellebrand, Sybille
    and Hertwig, Andre and Wunderlich, Hans-Joachim}, year={1998}, pages={36–41} }'
  chicago: 'Hellebrand, Sybille, Andre Hertwig, and Hans-Joachim Wunderlich. “Synthesis
    of Fast On-Line Testable Controllers for Data-Dominated Applications.” <i>IEEE
    Design and Test</i> 15, no. 4 (1998): 36–41.'
  ieee: S. Hellebrand, A. Hertwig, and H.-J. Wunderlich, “Synthesis of Fast On-Line
    Testable Controllers for Data-Dominated Applications,” <i>IEEE Design and Test</i>,
    vol. 15, no. 4, pp. 36–41, 1998.
  mla: Hellebrand, Sybille, et al. “Synthesis of Fast On-Line Testable Controllers
    for Data-Dominated Applications.” <i>IEEE Design and Test</i>, vol. 15, no. 4,
    IEEE, 1998, pp. 36–41.
  short: S. Hellebrand, A. Hertwig, H.-J. Wunderlich, IEEE Design and Test 15 (1998)
    36–41.
date_created: 2019-08-28T11:55:33Z
date_updated: 2022-05-11T16:53:11Z
department:
- _id: '48'
extern: '1'
intvolume: '        15'
issue: '4'
language:
- iso: eng
page: 36-41
publication: IEEE Design and Test
publisher: IEEE
status: public
title: Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications
type: journal_article
user_id: '209'
volume: 15
year: '1998'
...
---
_id: '13007'
author:
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: 'Hertwig A, Hellebrand S, Wunderlich H-J. Fast Self-Recovering Controllers.
    In: <i>16th IEEE VLSI Test Symposium (VTS’98)</i>. IEEE; 1998:296-302. doi:<a
    href="https://doi.org/10.1109/vtest.1998.670883">10.1109/vtest.1998.670883</a>'
  apa: Hertwig, A., Hellebrand, S., &#38; Wunderlich, H.-J. (1998). Fast Self-Recovering
    Controllers. <i>16th IEEE VLSI Test Symposium (VTS’98)</i>, 296–302. <a href="https://doi.org/10.1109/vtest.1998.670883">https://doi.org/10.1109/vtest.1998.670883</a>
  bibtex: '@inproceedings{Hertwig_Hellebrand_Wunderlich_1998, place={Monterey, CA,
    USA}, title={Fast Self-Recovering Controllers}, DOI={<a href="https://doi.org/10.1109/vtest.1998.670883">10.1109/vtest.1998.670883</a>},
    booktitle={16th IEEE VLSI Test Symposium (VTS’98)}, publisher={IEEE}, author={Hertwig,
    Andre and Hellebrand, Sybille and Wunderlich, Hans-Joachim}, year={1998}, pages={296–302}
    }'
  chicago: 'Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast
    Self-Recovering Controllers.” In <i>16th IEEE VLSI Test Symposium (VTS’98)</i>,
    296–302. Monterey, CA, USA: IEEE, 1998. <a href="https://doi.org/10.1109/vtest.1998.670883">https://doi.org/10.1109/vtest.1998.670883</a>.'
  ieee: 'A. Hertwig, S. Hellebrand, and H.-J. Wunderlich, “Fast Self-Recovering Controllers,”
    in <i>16th IEEE VLSI Test Symposium (VTS’98)</i>, 1998, pp. 296–302, doi: <a href="https://doi.org/10.1109/vtest.1998.670883">10.1109/vtest.1998.670883</a>.'
  mla: Hertwig, Andre, et al. “Fast Self-Recovering Controllers.” <i>16th IEEE VLSI
    Test Symposium (VTS’98)</i>, IEEE, 1998, pp. 296–302, doi:<a href="https://doi.org/10.1109/vtest.1998.670883">10.1109/vtest.1998.670883</a>.
  short: 'A. Hertwig, S. Hellebrand, H.-J. Wunderlich, in: 16th IEEE VLSI Test Symposium
    (VTS’98), IEEE, Monterey, CA, USA, 1998, pp. 296–302.'
date_created: 2019-08-28T10:24:40Z
date_updated: 2022-05-11T16:51:22Z
department:
- _id: '48'
doi: 10.1109/vtest.1998.670883
extern: '1'
language:
- iso: eng
page: 296-302
place: Monterey, CA, USA
publication: 16th IEEE VLSI Test Symposium (VTS'98)
publisher: IEEE
status: public
title: Fast Self-Recovering Controllers
type: conference
user_id: '209'
year: '1998'
...
---
_id: '13008'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
citation:
  ama: 'Hellebrand S, Wunderlich H-J, N. Yarmolik V. Self-Adjusting Output Data Compression:
    An Efficient BIST Technique for RAMs. In: <i>Design Automation and Test in Europe
    (DATE’98)</i>. ; 1998:173-179. doi:<a href="https://doi.org/10.1109/date.1998.655853">10.1109/date.1998.655853</a>'
  apa: 'Hellebrand, S., Wunderlich, H.-J., &#38; N. Yarmolik, V. (1998). Self-Adjusting
    Output Data Compression: An Efficient BIST Technique for RAMs. <i>Design Automation
    and Test in Europe (DATE’98)</i>, 173–179. <a href="https://doi.org/10.1109/date.1998.655853">https://doi.org/10.1109/date.1998.655853</a>'
  bibtex: '@inproceedings{Hellebrand_Wunderlich_N. Yarmolik_1998, place={Paris, France},
    title={Self-Adjusting Output Data Compression: An Efficient BIST Technique for
    RAMs}, DOI={<a href="https://doi.org/10.1109/date.1998.655853">10.1109/date.1998.655853</a>},
    booktitle={Design Automation and Test in Europe (DATE’98)}, author={Hellebrand,
    Sybille and Wunderlich, Hans-Joachim and N. Yarmolik, Vyacheslav}, year={1998},
    pages={173–179} }'
  chicago: 'Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik.
    “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.”
    In <i>Design Automation and Test in Europe (DATE’98)</i>, 173–79. Paris, France,
    1998. <a href="https://doi.org/10.1109/date.1998.655853">https://doi.org/10.1109/date.1998.655853</a>.'
  ieee: 'S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Self-Adjusting Output
    Data Compression: An Efficient BIST Technique for RAMs,” in <i>Design Automation
    and Test in Europe (DATE’98)</i>, 1998, pp. 173–179, doi: <a href="https://doi.org/10.1109/date.1998.655853">10.1109/date.1998.655853</a>.'
  mla: 'Hellebrand, Sybille, et al. “Self-Adjusting Output Data Compression: An Efficient
    BIST Technique for RAMs.” <i>Design Automation and Test in Europe (DATE’98)</i>,
    1998, pp. 173–79, doi:<a href="https://doi.org/10.1109/date.1998.655853">10.1109/date.1998.655853</a>.'
  short: 'S. Hellebrand, H.-J. Wunderlich, V. N. Yarmolik, in: Design Automation and
    Test in Europe (DATE’98), Paris, France, 1998, pp. 173–179.'
date_created: 2019-08-28T10:25:39Z
date_updated: 2022-05-11T16:50:33Z
department:
- _id: '48'
doi: 10.1109/date.1998.655853
extern: '1'
language:
- iso: eng
page: 173-179
place: Paris, France
publication: Design Automation and Test in Europe (DATE'98)
status: public
title: 'Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs'
type: conference
user_id: '209'
year: '1998'
...
---
_id: '13063'
author:
- first_name: Vyacheslav
  full_name: N. Yarmolik, Vyacheslav
  last_name: N. Yarmolik
- first_name: Yuri
  full_name: V. Klimets, Yuri
  last_name: V. Klimets
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: 'N. Yarmolik V, V. Klimets Y, Hellebrand S, Wunderlich H-J. New Transparent
    RAM BIST Based on Self-Adjusting Output Data Compression. In: <i>Design &#38;
    Diagnostics of Electronic Circuits &#38; Systems (DDECS’98)</i>. ; 1998:27-33.'
  apa: N. Yarmolik, V., V. Klimets, Y., Hellebrand, S., &#38; Wunderlich, H.-J. (1998).
    New Transparent RAM BIST Based on Self-Adjusting Output Data Compression. <i>Design
    &#38; Diagnostics of Electronic Circuits &#38; Systems (DDECS’98)</i>, 27–33.
  bibtex: '@inproceedings{N. Yarmolik_V. Klimets_Hellebrand_Wunderlich_1998, place={Szczyrk,
    Poland}, title={New Transparent RAM BIST Based on Self-Adjusting Output Data Compression},
    booktitle={Design &#38; Diagnostics of Electronic Circuits &#38; Systems (DDECS’98)},
    author={N. Yarmolik, Vyacheslav and V. Klimets, Yuri and Hellebrand, Sybille and
    Wunderlich, Hans-Joachim}, year={1998}, pages={27–33} }'
  chicago: N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim
    Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.”
    In <i>Design &#38; Diagnostics of Electronic Circuits &#38; Systems (DDECS’98)</i>,
    27–33. Szczyrk, Poland, 1998.
  ieee: V. N. Yarmolik, Y. V. Klimets, S. Hellebrand, and H.-J. Wunderlich, “New Transparent
    RAM BIST Based on Self-Adjusting Output Data Compression,” in <i>Design &#38;
    Diagnostics of Electronic Circuits &#38; Systems (DDECS’98)</i>, 1998, pp. 27–33.
  mla: N. Yarmolik, Vyacheslav, et al. “New Transparent RAM BIST Based on Self-Adjusting
    Output Data Compression.” <i>Design &#38; Diagnostics of Electronic Circuits &#38;
    Systems (DDECS’98)</i>, 1998, pp. 27–33.
  short: 'V. N. Yarmolik, Y. V. Klimets, S. Hellebrand, H.-J. Wunderlich, in: Design
    &#38; Diagnostics of Electronic Circuits &#38; Systems (DDECS’98), Szczyrk, Poland,
    1998, pp. 27–33.'
date_created: 2019-08-28T11:55:07Z
date_updated: 2022-05-11T16:52:31Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
page: 27-33
place: Szczyrk, Poland
publication: Design & Diagnostics of Electronic Circuits & Systems (DDECS'98)
status: public
title: New Transparent RAM BIST Based on Self-Adjusting Output Data Compression
type: conference
user_id: '209'
year: '1998'
...
---
_id: '13089'
author:
- first_name: Kun-Han
  full_name: Tsai, Kun-Han
  last_name: Tsai
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Janusz
  full_name: Rajski, Janusz
  last_name: Rajski
- first_name: Malgorzata
  full_name: Marek-Sadowska, Malgorzata
  last_name: Marek-Sadowska
citation:
  ama: 'Tsai K-H, Hellebrand S, Rajski J, Marek-Sadowska M. <i>STARBIST: Scan Autocorrelated
    Random Pattern Generation</i>. 4th IEEE International Test Synthesis Workshop,
    Santa Barbara, CA, USA; 1997.'
  apa: 'Tsai, K.-H., Hellebrand, S., Rajski, J., &#38; Marek-Sadowska, M. (1997).
    <i>STARBIST: Scan Autocorrelated Random Pattern Generation</i>. 4th IEEE International
    Test Synthesis Workshop, Santa Barbara, CA, USA.'
  bibtex: '@book{Tsai_Hellebrand_Rajski_Marek-Sadowska_1997, place={4th IEEE International
    Test Synthesis Workshop, Santa Barbara, CA, USA}, title={STARBIST: Scan Autocorrelated
    Random Pattern Generation}, author={Tsai, Kun-Han and Hellebrand, Sybille and
    Rajski, Janusz and Marek-Sadowska, Malgorzata}, year={1997} }'
  chicago: 'Tsai, Kun-Han, Sybille Hellebrand, Janusz Rajski, and Malgorzata Marek-Sadowska.
    <i>STARBIST: Scan Autocorrelated Random Pattern Generation</i>. 4th IEEE International
    Test Synthesis Workshop, Santa Barbara, CA, USA, 1997.'
  ieee: 'K.-H. Tsai, S. Hellebrand, J. Rajski, and M. Marek-Sadowska, <i>STARBIST:
    Scan Autocorrelated Random Pattern Generation</i>. 4th IEEE International Test
    Synthesis Workshop, Santa Barbara, CA, USA, 1997.'
  mla: 'Tsai, Kun-Han, et al. <i>STARBIST: Scan Autocorrelated Random Pattern Generation</i>.
    1997.'
  short: 'K.-H. Tsai, S. Hellebrand, J. Rajski, M. Marek-Sadowska, STARBIST: Scan
    Autocorrelated Random Pattern Generation, 4th IEEE International Test Synthesis
    Workshop, Santa Barbara, CA, USA, 1997.'
date_created: 2019-08-28T12:15:05Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA
status: public
title: 'STARBIST: Scan Autocorrelated Random Pattern Generation'
type: misc
user_id: '659'
year: '1997'
...
---
_id: '13090'
author:
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: Hertwig A, Hellebrand S, Wunderlich H-J. <i>Synthesis of Fast On-Line Testable
    Controllers for Data-Dominated Applications</i>. 3rd IEEE International On-Line
    Testing Workshop, Crete, Greece; 1997.
  apa: Hertwig, A., Hellebrand, S., &#38; Wunderlich, H.-J. (1997). <i>Synthesis of
    Fast On-Line Testable Controllers for Data-Dominated Applications</i>. 3rd IEEE
    International On-Line Testing Workshop, Crete, Greece.
  bibtex: '@book{Hertwig_Hellebrand_Wunderlich_1997, place={3rd IEEE International
    On-Line Testing Workshop, Crete, Greece}, title={Synthesis of Fast On-Line Testable
    Controllers for Data-Dominated Applications}, author={Hertwig, Andre and Hellebrand,
    Sybille and Wunderlich, Hans-Joachim}, year={1997} }'
  chicago: Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. <i>Synthesis
    of Fast On-Line Testable Controllers for Data-Dominated Applications</i>. 3rd
    IEEE International On-Line Testing Workshop, Crete, Greece, 1997.
  ieee: A. Hertwig, S. Hellebrand, and H.-J. Wunderlich, <i>Synthesis of Fast On-Line
    Testable Controllers for Data-Dominated Applications</i>. 3rd IEEE International
    On-Line Testing Workshop, Crete, Greece, 1997.
  mla: Hertwig, Andre, et al. <i>Synthesis of Fast On-Line Testable Controllers for
    Data-Dominated Applications</i>. 1997.
  short: A. Hertwig, S. Hellebrand, H.-J. Wunderlich, Synthesis of Fast On-Line Testable
    Controllers for Data-Dominated Applications, 3rd IEEE International On-Line Testing
    Workshop, Crete, Greece, 1997.
date_created: 2019-08-28T12:15:36Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 3rd IEEE International On-Line Testing Workshop, Crete, Greece
status: public
title: Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications
type: misc
user_id: '659'
year: '1997'
...
---
_id: '13009'
author:
- first_name: Kun-Han
  full_name: Tsai, Kun-Han
  last_name: Tsai
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Malgorzata
  full_name: Marek-Sadowska, Malgorzata
  last_name: Marek-Sadowska
- first_name: Janusz
  full_name: Rajski, Janusz
  last_name: Rajski
citation:
  ama: 'Tsai K-H, Hellebrand S, Marek-Sadowska M, Rajski J. STARBIST: Scan Autocorrelated
    Random Pattern Generation. In: <i>34th ACM/IEEE Design Automation Conference (DAC’97)</i>.
    IEEE; 1997. doi:<a href="https://doi.org/10.1109/dac.1997.597194">10.1109/dac.1997.597194</a>'
  apa: 'Tsai, K.-H., Hellebrand, S., Marek-Sadowska, M., &#38; Rajski, J. (1997).
    STARBIST: Scan Autocorrelated Random Pattern Generation. <i>34th ACM/IEEE Design
    Automation Conference (DAC’97)</i>. <a href="https://doi.org/10.1109/dac.1997.597194">https://doi.org/10.1109/dac.1997.597194</a>'
  bibtex: '@inproceedings{Tsai_Hellebrand_Marek-Sadowska_Rajski_1997, place={Anaheim,
    CA, USA}, title={STARBIST: Scan Autocorrelated Random Pattern Generation}, DOI={<a
    href="https://doi.org/10.1109/dac.1997.597194">10.1109/dac.1997.597194</a>}, booktitle={34th
    ACM/IEEE Design Automation Conference (DAC’97)}, publisher={IEEE}, author={Tsai,
    Kun-Han and Hellebrand, Sybille and Marek-Sadowska, Malgorzata and Rajski, Janusz},
    year={1997} }'
  chicago: 'Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz
    Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.” In <i>34th
    ACM/IEEE Design Automation Conference (DAC’97)</i>. Anaheim, CA, USA: IEEE, 1997.
    <a href="https://doi.org/10.1109/dac.1997.597194">https://doi.org/10.1109/dac.1997.597194</a>.'
  ieee: 'K.-H. Tsai, S. Hellebrand, M. Marek-Sadowska, and J. Rajski, “STARBIST: Scan
    Autocorrelated Random Pattern Generation,” 1997, doi: <a href="https://doi.org/10.1109/dac.1997.597194">10.1109/dac.1997.597194</a>.'
  mla: 'Tsai, Kun-Han, et al. “STARBIST: Scan Autocorrelated Random Pattern Generation.”
    <i>34th ACM/IEEE Design Automation Conference (DAC’97)</i>, IEEE, 1997, doi:<a
    href="https://doi.org/10.1109/dac.1997.597194">10.1109/dac.1997.597194</a>.'
  short: 'K.-H. Tsai, S. Hellebrand, M. Marek-Sadowska, J. Rajski, in: 34th ACM/IEEE
    Design Automation Conference (DAC’97), IEEE, Anaheim, CA, USA, 1997.'
date_created: 2019-08-28T10:25:41Z
date_updated: 2022-05-11T16:53:52Z
department:
- _id: '48'
doi: 10.1109/dac.1997.597194
extern: '1'
language:
- iso: eng
place: Anaheim, CA, USA
publication: 34th ACM/IEEE Design Automation Conference (DAC'97)
publisher: IEEE
status: public
title: 'STARBIST: Scan Autocorrelated Random Pattern Generation'
type: conference
user_id: '209'
year: '1997'
...
---
_id: '13087'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: Hellebrand S, Wunderlich H-J. <i>Using Embedded Processors for BIST</i>. 3rd
    IEEE International Test Synthesis Workshop, Santa Barbara, CA; 1996.
  apa: Hellebrand, S., &#38; Wunderlich, H.-J. (1996). <i>Using Embedded Processors
    for BIST</i>. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA.
  bibtex: '@book{Hellebrand_Wunderlich_1996, place={3rd IEEE International Test Synthesis
    Workshop, Santa Barbara, CA}, title={Using Embedded Processors for BIST}, author={Hellebrand,
    Sybille and Wunderlich, Hans-Joachim}, year={1996} }'
  chicago: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Using Embedded Processors
    for BIST</i>. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA,
    1996.
  ieee: S. Hellebrand and H.-J. Wunderlich, <i>Using Embedded Processors for BIST</i>.
    3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1996.
  mla: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Using Embedded Processors
    for BIST</i>. 1996.
  short: S. Hellebrand, H.-J. Wunderlich, Using Embedded Processors for BIST, 3rd
    IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1996.
date_created: 2019-08-28T12:14:03Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA
status: public
title: Using Embedded Processors for BIST
type: misc
user_id: '659'
year: '1996'
...
---
_id: '13088'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
citation:
  ama: Hellebrand S, Wunderlich H-J, Hertwig A. <i>Mixed-Mode BIST Using Embedded
    Processors</i>. 2nd IEEE International On-Line Testing Workshop. Biarritz, France;
    1996.
  apa: Hellebrand, S., Wunderlich, H.-J., &#38; Hertwig, A. (1996). <i>Mixed-Mode
    BIST Using Embedded Processors</i>. 2nd IEEE International On-Line Testing Workshop.
    Biarritz, France.
  bibtex: '@book{Hellebrand_Wunderlich_Hertwig_1996, place={2nd IEEE International
    On-Line Testing Workshop. Biarritz, France}, title={Mixed-Mode BIST Using Embedded
    Processors}, author={Hellebrand, Sybille and Wunderlich, Hans-Joachim and Hertwig,
    Andre}, year={1996} }'
  chicago: Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. <i>Mixed-Mode
    BIST Using Embedded Processors</i>. 2nd IEEE International On-Line Testing Workshop.
    Biarritz, France, 1996.
  ieee: S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, <i>Mixed-Mode BIST Using
    Embedded Processors</i>. 2nd IEEE International On-Line Testing Workshop. Biarritz,
    France, 1996.
  mla: Hellebrand, Sybille, et al. <i>Mixed-Mode BIST Using Embedded Processors</i>.
    1996.
  short: S. Hellebrand, H.-J. Wunderlich, A. Hertwig, Mixed-Mode BIST Using Embedded
    Processors, 2nd IEEE International On-Line Testing Workshop. Biarritz, France,
    1996.
date_created: 2019-08-28T12:14:35Z
date_updated: 2022-01-06T06:51:28Z
department:
- _id: '48'
extern: '1'
keyword:
- WORKSHOP
language:
- iso: eng
place: 2nd IEEE International On-Line Testing Workshop. Biarritz, France
status: public
title: Mixed-Mode BIST Using Embedded Processors
type: misc
user_id: '659'
year: '1996'
...
---
_id: '13010'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: Andre
  full_name: Hertwig, Andre
  last_name: Hertwig
citation:
  ama: 'Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors.
    In: <i>IEEE International Test Conference (ITC’96)</i>. IEEE; 1996:195-204. doi:<a
    href="https://doi.org/10.1109/test.1996.556962">10.1109/test.1996.556962</a>'
  apa: Hellebrand, S., Wunderlich, H.-J., &#38; Hertwig, A. (1996). Mixed-Mode BIST
    Using Embedded Processors. <i>IEEE International Test Conference (ITC’96)</i>,
    195–204. <a href="https://doi.org/10.1109/test.1996.556962">https://doi.org/10.1109/test.1996.556962</a>
  bibtex: '@inproceedings{Hellebrand_Wunderlich_Hertwig_1996, place={Washington, DC,
    USA}, title={Mixed-Mode BIST Using Embedded Processors}, DOI={<a href="https://doi.org/10.1109/test.1996.556962">10.1109/test.1996.556962</a>},
    booktitle={IEEE International Test Conference (ITC’96)}, publisher={IEEE}, author={Hellebrand,
    Sybille and Wunderlich, Hans-Joachim and Hertwig, Andre}, year={1996}, pages={195–204}
    }'
  chicago: 'Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode
    BIST Using Embedded Processors.” In <i>IEEE International Test Conference (ITC’96)</i>,
    195–204. Washington, DC, USA: IEEE, 1996. <a href="https://doi.org/10.1109/test.1996.556962">https://doi.org/10.1109/test.1996.556962</a>.'
  ieee: 'S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded
    Processors,” in <i>IEEE International Test Conference (ITC’96)</i>, 1996, pp.
    195–204, doi: <a href="https://doi.org/10.1109/test.1996.556962">10.1109/test.1996.556962</a>.'
  mla: Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” <i>IEEE
    International Test Conference (ITC’96)</i>, IEEE, 1996, pp. 195–204, doi:<a href="https://doi.org/10.1109/test.1996.556962">10.1109/test.1996.556962</a>.
  short: 'S. Hellebrand, H.-J. Wunderlich, A. Hertwig, in: IEEE International Test
    Conference (ITC’96), IEEE, Washington, DC, USA, 1996, pp. 195–204.'
date_created: 2019-08-28T10:25:42Z
date_updated: 2022-05-11T16:54:33Z
department:
- _id: '48'
doi: 10.1109/test.1996.556962
extern: '1'
language:
- iso: eng
page: 195-204
place: Washington, DC, USA
publication: IEEE International Test Conference (ITC'96)
publisher: IEEE
status: public
title: Mixed-Mode BIST Using Embedded Processors
type: conference
user_id: '209'
year: '1996'
...
---
_id: '13026'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
citation:
  ama: Hellebrand S, Wunderlich H-J. <i>Synthesis Procedures for Self-Testable Controllers</i>.
    University of Siegen, Germany; 1995.
  apa: Hellebrand, S., &#38; Wunderlich, H.-J. (1995). <i>Synthesis Procedures for
    Self-Testable Controllers</i>. University of Siegen, Germany.
  bibtex: '@book{Hellebrand_Wunderlich_1995, place={University of Siegen, Germany},
    title={Synthesis Procedures for Self-Testable Controllers}, author={Hellebrand,
    Sybille and Wunderlich, Hans-Joachim}, year={1995} }'
  chicago: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Synthesis Procedures
    for Self-Testable Controllers</i>. University of Siegen, Germany, 1995.
  ieee: S. Hellebrand and H.-J. Wunderlich, <i>Synthesis Procedures for Self-Testable
    Controllers</i>. University of Siegen, Germany, 1995.
  mla: Hellebrand, Sybille, and Hans-Joachim Wunderlich. <i>Synthesis Procedures for
    Self-Testable Controllers</i>. 1995.
  short: S. Hellebrand, H.-J. Wunderlich, Synthesis Procedures for Self-Testable Controllers,
    University of Siegen, Germany, 1995.
date_created: 2019-08-28T10:32:24Z
date_updated: 2022-01-06T06:51:27Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
place: University of Siegen, Germany
status: public
title: Synthesis Procedures for Self-Testable Controllers
type: report
user_id: '659'
year: '1995'
...
---
_id: '13027'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Hans-Joachim
  full_name: Wunderlich, Hans-Joachim
  last_name: Wunderlich
- first_name: F.
  full_name: Goncalves, F.
  last_name: Goncalves
- first_name: Joao
  full_name: Paulo Teixeira, Joao
  last_name: Paulo Teixeira
citation:
  ama: Hellebrand S, Wunderlich H-J, Goncalves F, Paulo Teixeira J. <i>Evaluation
    of Self-Testable Controller Architectures Based on Realistic Fault Analysis</i>.
    University Siegen, Germany; 1995.
  apa: Hellebrand, S., Wunderlich, H.-J., Goncalves, F., &#38; Paulo Teixeira, J.
    (1995). <i>Evaluation of Self-Testable Controller Architectures Based on Realistic
    Fault Analysis</i>. University Siegen, Germany.
  bibtex: '@book{Hellebrand_Wunderlich_Goncalves_Paulo Teixeira_1995, place={University
    Siegen, Germany}, title={Evaluation of Self-Testable Controller Architectures
    Based on Realistic Fault Analysis}, author={Hellebrand, Sybille and Wunderlich,
    Hans-Joachim and Goncalves, F. and Paulo Teixeira, Joao}, year={1995} }'
  chicago: Hellebrand, Sybille, Hans-Joachim Wunderlich, F. Goncalves, and Joao Paulo
    Teixeira. <i>Evaluation of Self-Testable Controller Architectures Based on Realistic
    Fault Analysis</i>. University Siegen, Germany, 1995.
  ieee: S. Hellebrand, H.-J. Wunderlich, F. Goncalves, and J. Paulo Teixeira, <i>Evaluation
    of Self-Testable Controller Architectures Based on Realistic Fault Analysis</i>.
    University Siegen, Germany, 1995.
  mla: Hellebrand, Sybille, et al. <i>Evaluation of Self-Testable Controller Architectures
    Based on Realistic Fault Analysis</i>. 1995.
  short: S. Hellebrand, H.-J. Wunderlich, F. Goncalves, J. Paulo Teixeira, Evaluation
    of Self-Testable Controller Architectures Based on Realistic Fault Analysis, University
    Siegen, Germany, 1995.
date_created: 2019-08-28T10:32:25Z
date_updated: 2022-01-06T06:51:27Z
department:
- _id: '48'
extern: '1'
language:
- iso: eng
place: University Siegen, Germany
status: public
title: Evaluation of Self-Testable Controller Architectures Based on Realistic Fault
  Analysis
type: report
user_id: '659'
year: '1995'
...