[{"status":"public","abstract":[{"lang":"eng","text":"Intelligent automotive electronics significantly improved driving safety in the last decades. With the increasing complexity of automotive systems, dependability of the electronic components themselves and of their interaction must be assured to avoid any risk to driving safety due to unexpected failures caused by internal or external faults. Additionally, Virtual Prototypes (VPs) have been accepted in many areas of system development processes in the automotive industry as platforms for SW development, verification, and design space exploration. We believe that VPs will significantly contribute to the analysis of safety conditions for automotive electronics. This paper shows the advantages of such a methodology based on today's industrial needs, presents the current state of the art in this field, and outlines upcoming research challenges that need to be addressed to make this vision a reality."}],"publication":"Design Automation Conference (DAC)","type":"conference","language":[{"iso":"eng"}],"department":[{"_id":"58"}],"user_id":"15931","_id":"24311","citation":{"ieee":"J.-H. Oetjens <i>et al.</i>, “Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges,” 2014, doi: <a href=\"https://doi.org/10.1145/2593069.2602976\">10.1145/2593069.2602976</a>.","chicago":"Oetjens, Jan-Hendrik, Markus Becker, Christoph Kuznik, Wolfgang Müller, Nico Bannow, Oliver Brinkmann, Andreas Burger, et al. “Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges.” In <i>Design Automation Conference (DAC)</i>, 2014. <a href=\"https://doi.org/10.1145/2593069.2602976\">https://doi.org/10.1145/2593069.2602976</a>.","ama":"Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. In: <i>Design Automation Conference (DAC)</i>. ; 2014. doi:<a href=\"https://doi.org/10.1145/2593069.2602976\">10.1145/2593069.2602976</a>","mla":"Oetjens, Jan-Hendrik, et al. “Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges.” <i>Design Automation Conference (DAC)</i>, 2014, doi:<a href=\"https://doi.org/10.1145/2593069.2602976\">10.1145/2593069.2602976</a>.","short":"J.-H. Oetjens, M. Becker, C. Kuznik, W. Müller, N. Bannow, O. Brinkmann, A. Burger, M. Chaari, S. Chakraborty, R. Drechsler, W. Ecker, K. Grüttner, T. Kruse, H.M. Le, M. Mauderer, D. Mueller-Gritschneider, F. Poppen, H. Post, Se. Reiter, W. Rosenstiel, S. Roth, U. Schlichtmann, A. Von Schwerin, B.A. Tabacaru, A. Viehl, in: Design Automation Conference (DAC), 2014.","bibtex":"@inproceedings{Oetjens_Becker_Kuznik_Müller_Bannow_Brinkmann_Burger_Chaari_Chakraborty_Drechsler_et al._2014, title={Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges}, DOI={<a href=\"https://doi.org/10.1145/2593069.2602976\">10.1145/2593069.2602976</a>}, booktitle={Design Automation Conference (DAC)}, author={Oetjens, Jan-Hendrik and Becker, Markus and Kuznik, Christoph and Müller, Wolfgang and Bannow, Nico and Brinkmann, Oliver and Burger, Andreas and Chaari, Moomen and Chakraborty, Samarjit and Drechsler, R. and et al.}, year={2014} }","apa":"Oetjens, J.-H., Becker, M., Kuznik, C., Müller, W., Bannow, N., Brinkmann, O., Burger, A., Chaari, M., Chakraborty, S., Drechsler, R., Ecker, W., Grüttner, K., Kruse, T., Le, H. M., Mauderer, M., Mueller-Gritschneider, D., Poppen, F., Post, H., Reiter, Se., … Viehl, A. (2014). Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. <i>Design Automation Conference (DAC)</i>. <a href=\"https://doi.org/10.1145/2593069.2602976\">https://doi.org/10.1145/2593069.2602976</a>"},"year":"2014","related_material":{"link":[{"relation":"confirmation","url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6881440"}]},"doi":"10.1145/2593069.2602976","title":"Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges","date_created":"2021-09-14T07:06:59Z","author":[{"last_name":"Oetjens","full_name":"Oetjens, Jan-Hendrik","first_name":"Jan-Hendrik"},{"full_name":"Becker, Markus","last_name":"Becker","first_name":"Markus"},{"full_name":"Kuznik, Christoph","last_name":"Kuznik","first_name":"Christoph"},{"first_name":"Wolfgang","id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller"},{"full_name":"Bannow, Nico","last_name":"Bannow","first_name":"Nico"},{"first_name":"Oliver","full_name":"Brinkmann, Oliver","last_name":"Brinkmann"},{"full_name":"Burger, Andreas","last_name":"Burger","first_name":"Andreas"},{"first_name":"Moomen","last_name":"Chaari","full_name":"Chaari, Moomen"},{"first_name":"Samarjit","full_name":"Chakraborty, Samarjit","last_name":"Chakraborty"},{"first_name":"R.","full_name":"Drechsler, R.","last_name":"Drechsler"},{"last_name":"Ecker","full_name":"Ecker, Wolfgang","first_name":"Wolfgang"},{"first_name":"Kim","last_name":"Grüttner","full_name":"Grüttner, Kim"},{"full_name":"Kruse, Thomas","last_name":"Kruse","first_name":"Thomas"},{"first_name":"Hoang M","last_name":"Le","full_name":"Le, Hoang M"},{"last_name":"Mauderer","full_name":"Mauderer, M.","first_name":"M."},{"last_name":"Mueller-Gritschneider","full_name":"Mueller-Gritschneider, Daniel","first_name":"Daniel"},{"first_name":"Frank","full_name":"Poppen, Frank","last_name":"Poppen"},{"first_name":"Hendrik","last_name":"Post","full_name":"Post, Hendrik"},{"first_name":"SEbastian","full_name":"Reiter, SEbastian","last_name":"Reiter"},{"first_name":"Wolfgang","full_name":"Rosenstiel, Wolfgang","last_name":"Rosenstiel"},{"first_name":"S. ","full_name":"Roth, S. ","last_name":"Roth"},{"first_name":"Ulf","full_name":"Schlichtmann, Ulf","last_name":"Schlichtmann"},{"last_name":"Von Schwerin","full_name":"Von Schwerin, Andreas","first_name":"Andreas"},{"last_name":"Tabacaru","full_name":"Tabacaru, Bogdan Andrei","first_name":"Bogdan Andrei"},{"first_name":"Alexander","full_name":"Viehl, Alexander","last_name":"Viehl"}],"date_updated":"2022-02-17T13:47:16Z"},{"status":"public","type":"journal_article","publication":"Design, Automation and Test in Europe DATE, University Booth, Dresden","language":[{"iso":"eng"}],"user_id":"16243","department":[{"_id":"672"}],"_id":"25164","citation":{"chicago":"Becker, Markus, Wolfgang Müller, Joachim Stroop, and Ulrich Kiffmeier. “HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC.” <i>Design, Automation and Test in Europe DATE, University Booth, Dresden</i>, 2014.","ieee":"M. Becker, W. Müller, J. Stroop, and U. Kiffmeier, “HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC,” <i>Design, Automation and Test in Europe DATE, University Booth, Dresden</i>, 2014.","ama":"Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. <i>Design, Automation and Test in Europe DATE, University Booth, Dresden</i>. Published online 2014.","apa":"Becker, M., Müller, W., Stroop, J., &#38; Kiffmeier, U. (2014). HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. <i>Design, Automation and Test in Europe DATE, University Booth, Dresden</i>.","short":"M. Becker, W. Müller, J. Stroop, U. Kiffmeier, Design, Automation and Test in Europe DATE, University Booth, Dresden (2014).","bibtex":"@article{Becker_Müller_Stroop_Kiffmeier_2014, title={HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC}, journal={Design, Automation and Test in Europe DATE, University Booth, Dresden}, author={Becker, Markus and Müller, Wolfgang and Stroop, Joachim and Kiffmeier, Ulrich}, year={2014} }","mla":"Becker, Markus, et al. “HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC.” <i>Design, Automation and Test in Europe DATE, University Booth, Dresden</i>, 2014."},"year":"2014","title":"HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC","date_created":"2021-09-30T10:17:43Z","author":[{"last_name":"Becker","full_name":"Becker, Markus","first_name":"Markus"},{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"},{"first_name":"Joachim","full_name":"Stroop, Joachim","last_name":"Stroop"},{"full_name":"Kiffmeier, Ulrich","last_name":"Kiffmeier","first_name":"Ulrich"}],"date_updated":"2024-04-18T21:06:21Z"},{"language":[{"iso":"eng"}],"user_id":"5786","department":[{"_id":"58"}],"_id":"25120","status":"public","type":"conference","publication":"Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","conference":{"location":"Greece, Sep. 2014, IEEE"},"title":"Architectural Low-Power Design Using Transaction-Based System Simulation","date_created":"2021-09-29T12:06:12Z","author":[{"first_name":"Fabian","last_name":"Mischkalla","full_name":"Mischkalla, Fabian"},{"full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller","first_name":"Wolfgang"}],"publisher":"IEEE","date_updated":"2023-01-16T11:29:24Z","citation":{"ama":"Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: <i>Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)</i>. IEEE; 2014.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using Transaction-Based System Simulation.” In <i>Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)</i>. IEEE, 2014.","ieee":"F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based System Simulation,” Greece, Sep. 2014, IEEE, 2014.","apa":"Mischkalla, F., &#38; Müller, W. (2014). Architectural Low-Power Design Using Transaction-Based System Simulation. <i>Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)</i>.","bibtex":"@inproceedings{Mischkalla_Müller_2014, title={Architectural Low-Power Design Using Transaction-Based System Simulation}, booktitle={Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)}, publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2014} }","mla":"Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using Transaction-Based System Simulation.” <i>Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)</i>, IEEE, 2014.","short":"F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014."},"year":"2014"},{"user_id":"5786","date_created":"2021-09-30T07:18:43Z","author":[{"first_name":"M. tech. Mabel Mary","full_name":"Joy, M. tech. Mabel Mary","last_name":"Joy"},{"id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang"},{"first_name":"Franz-Josef","full_name":"Rammig, Franz-Josef","last_name":"Rammig"}],"department":[{"_id":"58"}],"date_updated":"2023-01-16T11:36:02Z","_id":"25146","language":[{"iso":"eng"}],"title":"Source code annotated memory leak detection for soft real time embedded systems with resource constraints","type":"conference","publication":"12th IEEE International conference on Embedded Computing","citation":{"mla":"Joy, M. tech. Mabel Mary, et al. “Source Code Annotated Memory Leak Detection for Soft Real Time Embedded Systems with Resource Constraints.” <i>12th IEEE International Conference on Embedded Computing</i>, 2014.","bibtex":"@inproceedings{Joy_Müller_Rammig_2014, title={Source code annotated memory leak detection for soft real time embedded systems with resource constraints}, booktitle={12th IEEE International conference on Embedded Computing}, author={Joy, M. tech. Mabel Mary and Müller, Wolfgang and Rammig, Franz-Josef}, year={2014} }","short":"M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: 12th IEEE International Conference on Embedded Computing, 2014.","apa":"Joy, M. tech. M. M., Müller, W., &#38; Rammig, F.-J. (2014). Source code annotated memory leak detection for soft real time embedded systems with resource constraints. <i>12th IEEE International Conference on Embedded Computing</i>.","ama":"Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: <i>12th IEEE International Conference on Embedded Computing</i>. ; 2014.","chicago":"Joy, M. tech. Mabel Mary, Wolfgang Müller, and Franz-Josef Rammig. “Source Code Annotated Memory Leak Detection for Soft Real Time Embedded Systems with Resource Constraints.” In <i>12th IEEE International Conference on Embedded Computing</i>, 2014.","ieee":"M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Source code annotated memory leak detection for soft real time embedded systems with resource constraints,” 2014."},"status":"public","year":"2014"},{"title":"Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation","date_created":"2021-09-30T07:13:17Z","author":[{"first_name":"Fabian","last_name":"Mischkalla","full_name":"Mischkalla, Fabian"},{"first_name":"Wolfgang","last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang"}],"date_updated":"2023-01-16T11:28:39Z","citation":{"chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation.” In <i>PATMOS 2014</i>. Palma de Mallorca, Spain, 2014.","ieee":"F. Mischkalla and W. Müller, “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation,” 2014.","ama":"Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: <i>PATMOS 2014</i>. ; 2014.","apa":"Mischkalla, F., &#38; Müller, W. (2014). Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. <i>PATMOS 2014</i>.","bibtex":"@inproceedings{Mischkalla_Müller_2014, place={Palma de Mallorca, Spain}, title={Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation}, booktitle={PATMOS 2014}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2014} }","short":"F. Mischkalla, W. Müller, in: PATMOS 2014, Palma de Mallorca, Spain, 2014.","mla":"Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation.” <i>PATMOS 2014</i>, 2014."},"year":"2014","place":"Palma de Mallorca, Spain","language":[{"iso":"eng"}],"user_id":"5786","department":[{"_id":"58"}],"_id":"25144","status":"public","type":"conference","publication":"PATMOS 2014"},{"type":"conference","status":"public","abstract":[{"lang":"eng","text":"This paper presents an advanced eight levels spanning SystemC based virtual platform methodology and framework - referred to as HeroeS 3 - providing smooth application to platform mapping and continuous co-refinement of a virtual prototype with its physical environment model. For heterogeneity support, various SystemC extensions are combined covering continuous/discrete models of computation and different communication abstractions, such as analog mixed-signal models, abstract RTOS/HAL/middleware models, TLM bus models, and QEMU wrappers. We enable dependability assessment by Fault Effect Modeling (FEM) at the virtual prototype in order to avoid risking physical injury or damage. Also, simulation results are deterministic and can be evaluated interactively or offline. We apply FEM to both the physical environment model and the different abstractions of the virtual prototype. Currently, we focus on sensor failures and application control flow errors."}],"user_id":"5786","department":[{"_id":"58"}],"_id":"36918","language":[{"iso":"eng"}],"keyword":["Computational modeling","Finite element analysis","Prototypes","Abstracts","Software","Fault tolerance","Fault tolerant systems"],"citation":{"mla":"Becker, Markus, et al. <i>Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems</i>. IEEE, 2014, doi:<a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">10.1109/ICCPS.2014.6843726</a>.","short":"M. Becker, C. Kuznik, W. Müller, in: IEEE, Berlin, 2014.","bibtex":"@inproceedings{Becker_Kuznik_Müller_2014, place={Berlin}, title={Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems}, DOI={<a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">10.1109/ICCPS.2014.6843726</a>}, publisher={IEEE}, author={Becker, Markus and Kuznik, Christoph and Müller, Wolfgang}, year={2014} }","apa":"Becker, M., Kuznik, C., &#38; Müller, W. (2014). <i>Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems</i>. ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin. <a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">https://doi.org/10.1109/ICCPS.2014.6843726</a>","ama":"Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:<a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">10.1109/ICCPS.2014.6843726</a>","chicago":"Becker, Markus, Christoph Kuznik, and Wolfgang Müller. “Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems.” Berlin: IEEE, 2014. <a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">https://doi.org/10.1109/ICCPS.2014.6843726</a>.","ieee":"M. Becker, C. Kuznik, and W. Müller, “Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems,” presented at the ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin, 2014, doi: <a href=\"https://doi.org/10.1109/ICCPS.2014.6843726\">10.1109/ICCPS.2014.6843726</a>."},"year":"2014","place":"Berlin","author":[{"full_name":"Becker, Markus","last_name":"Becker","first_name":"Markus"},{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"first_name":"Wolfgang","last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang"}],"date_created":"2023-01-16T11:57:08Z","date_updated":"2023-01-16T11:57:22Z","publisher":"IEEE","doi":"10.1109/ICCPS.2014.6843726","conference":{"location":"Berlin","name":"ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS)"},"title":"Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems"},{"_id":"36917","user_id":"5786","department":[{"_id":"58"}],"keyword":["System Design","Verification"],"language":[{"iso":"eng"}],"type":"conference","abstract":[{"lang":"eng","text":"The ever-increasing complexity of heterogeneous electronic systems demand for intensified abstraction and automation efforts to improve design, verification and validation productivity, especially in earlier phases of system engineering. Within the verification activity various metrics can be applied to determine functional correctness or the overall progress. Here, a supporting verification methodology defining high-level verification planning down to the actual metric code development is essential. Moreover, an advanced assistance for the designer, such as a tooling infrastructure to automatize and accelerate the metric code implementation, is needed to minimize the influence of errorprone manual coding. In this article we present a single-source verification metric code-generation methodology for improved coverage automation. We determine (i) a suitable metric model for model-based capture of verification metrics as well as (ii) an assisted model-based processing and generation flow of the verification environment and metric skeletons. We apply our method to a SystemC case-study, in doing so, targeting metric code implementation productivity and consistency enhancement."}],"status":"public","date_updated":"2023-01-16T11:44:06Z","author":[{"first_name":"Christoph","full_name":"Kuznik, Christoph","last_name":"Kuznik"},{"full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller","first_name":"Wolfgang"},{"full_name":"Defo, Gilles Bertrand","last_name":"Defo","first_name":"Gilles Bertrand"}],"date_created":"2023-01-16T11:43:50Z","title":"An Assisted Single Source Verification Metric Model Code Generation Methodology","conference":{"name":"Proceedings of the Electronic System Level Synthesis Conference (ESLSyn)"},"place":"San Francisco, USA","year":"2014","citation":{"ama":"Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.","ieee":"C. Kuznik, W. Müller, and G. B. Defo, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” presented at the Proceedings of the Electronic System Level Synthesis Conference (ESLSyn), 2014.","chicago":"Kuznik, Christoph, Wolfgang Müller, and Gilles Bertrand Defo. “An Assisted Single Source Verification Metric Model Code Generation Methodology.” San Francisco, USA, 2014.","short":"C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014.","bibtex":"@inproceedings{Kuznik_Müller_Defo_2014, place={San Francisco, USA}, title={An Assisted Single Source Verification Metric Model Code Generation Methodology}, author={Kuznik, Christoph and Müller, Wolfgang and Defo, Gilles Bertrand}, year={2014} }","mla":"Kuznik, Christoph, et al. <i>An Assisted Single Source Verification Metric Model Code Generation Methodology</i>. 2014.","apa":"Kuznik, C., Müller, W., &#38; Defo, G. B. (2014). <i>An Assisted Single Source Verification Metric Model Code Generation Methodology</i>. Proceedings of the Electronic System Level Synthesis Conference (ESLSyn)."}},{"publication":"26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen","type":"conference","status":"public","citation":{"ieee":"C. Kuznik and W. Müller, “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM,” 2014.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM.” In <i>26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen</i>, 2014.","ama":"Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: <i>26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen</i>. ; 2014.","apa":"Kuznik, C., &#38; Müller, W. (2014). Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. <i>26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen</i>.","mla":"Kuznik, Christoph, and Wolfgang Müller. “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM.” <i>26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen</i>, 2014.","short":"C. Kuznik, W. Müller, in: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.","bibtex":"@inproceedings{Kuznik_Müller_2014, title={Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM}, booktitle={26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2014} }"},"abstract":[{"text":"Zur Sicherstellung hoher Zuverlässigkeits- und Fehlertoleranzwerte von Schaltungen und ganzen Systemen finden vermehrt Test- und Verifikationsmethoden Anwendung die einen virtuellen Prototypen (VP) des Systems bereits frühzeitig im Entwurfsablauf einem Stresstest unterziehen. Hierbei werden speziell für die Domäne relevante Fehlerinjektoren verwendet (Digital, Mixed-Signal, Mechanik) die anhand von Fehlermodellen geeignete Testfälle erzeugen und in das System über Stimuli bzw. direkt injizieren. Jede effektive Anwendung einer Methode bedingt jedoch auch das Vorhandensein einer zugrundeliegenden Methodik. In diesem Beitrag wird die System Verification Methodology (SVM) vorgestellt werden, eine universell einsetzbare und erweiterbare Infrastruktur zur Beschreibung von Testumgebungen auf Basis der SystemC Sprache und Simulationskernels.","lang":"eng"}],"year":"2014","department":[{"_id":"58"}],"date_created":"2021-09-30T10:26:58Z","author":[{"full_name":"Kuznik, Christoph","last_name":"Kuznik","first_name":"Christoph"},{"first_name":"Wolfgang","last_name":"Müller","full_name":"Müller, Wolfgang","id":"16243"}],"user_id":"5786","_id":"25166","date_updated":"2023-01-16T11:46:54Z","language":[{"iso":"ger"}],"title":"Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM"},{"_id":"25163","department":[{"_id":"58"}],"user_id":"5786","language":[{"iso":"ger"}],"publication":"17. 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(2013). HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures. <i>16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing</i>.","bibtex":"@inproceedings{Becker_Kiffmeier_Müller_2013, title={HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures}, booktitle={16th IEEE Computer Society Symposium on Object/Component/Service-oriented Real-time Distributed Computing}, author={Becker, Markus and Kiffmeier, Ulrich and Müller, Wolfgang}, year={2013} }","mla":"Becker, Markus, et al. “HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures.” <i>16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing</i>, 2013.","short":"M. Becker, U. Kiffmeier, W. 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