[{"year":"2013","citation":{"ama":"Kuznik C, F. S. Oliveira M, Müller W. SystemC Verification Components - An enhanced OVM/UVM for SystemC. In: <i>EdaWorkshop 13</i>. ; 2013.","ieee":"C. Kuznik, M. F. S. Oliveira, and W. Müller, “SystemC Verification Components - An enhanced OVM/UVM for SystemC,” Mrz. 2013 - Poster, 2013.","chicago":"Kuznik, Christoph, Marcio F. S. Oliveira, and Wolfgang Müller. “SystemC Verification Components - An Enhanced OVM/UVM for SystemC.” In <i>EdaWorkshop 13</i>, 2013.","apa":"Kuznik, C., F. S. Oliveira, M., &#38; Müller, W. (2013). SystemC Verification Components - An enhanced OVM/UVM for SystemC. <i>EdaWorkshop 13</i>.","short":"C. Kuznik, M. F. S. Oliveira, W. Müller, in: EdaWorkshop 13, 2013.","bibtex":"@inproceedings{Kuznik_F. S. Oliveira_Müller_2013, title={SystemC Verification Components - An enhanced OVM/UVM for SystemC}, booktitle={edaWorkshop 13}, author={Kuznik, Christoph and F. S. Oliveira, Marcio and Müller, Wolfgang}, year={2013} }","mla":"Kuznik, Christoph, et al. “SystemC Verification Components - An Enhanced OVM/UVM for SystemC.” <i>EdaWorkshop 13</i>, 2013."},"title":"SystemC Verification Components - An enhanced OVM/UVM for SystemC","conference":{"location":"Mrz. 2013 - Poster"},"date_updated":"2022-01-06T06:57:07Z","author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"first_name":"Marcio","full_name":"F. S. Oliveira, Marcio","last_name":"F. S. Oliveira"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller"}],"date_created":"2021-10-07T07:58:38Z","status":"public","publication":"edaWorkshop 13","type":"conference","language":[{"iso":"eng"}],"_id":"25606","department":[{"_id":"672"}],"user_id":"21240"},{"language":[{"iso":"ger"}],"user_id":"21240","department":[{"_id":"672"}],"_id":"25612","status":"public","type":"conference","publication":"Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)","title":"Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen","author":[{"first_name":"Fabian","full_name":"Mischkalla, Fabian","last_name":"Mischkalla"},{"first_name":"Wolfgang","id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller"}],"date_created":"2021-10-07T08:27:55Z","date_updated":"2022-01-06T06:57:08Z","citation":{"ama":"Mischkalla F, Müller W. Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen. In: <i>Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>. ; 2013.","ieee":"F. Mischkalla and W. Müller, “Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen,” 2013.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen.” In <i>Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>, 2013.","short":"F. Mischkalla, W. Müller, in: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013.","bibtex":"@inproceedings{Mischkalla_Müller_2013, title={Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen}, booktitle={Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013} }","mla":"Mischkalla, Fabian, and Wolfgang Müller. “Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen.” <i>Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>, 2013.","apa":"Mischkalla, F., &#38; Müller, W. (2013). Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen. <i>Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)</i>."},"year":"2013"},{"type":"conference","publication":"Open SANITAS SystemC Verification Workshop","status":"public","_id":"25614","user_id":"21240","department":[{"_id":"672"}],"language":[{"iso":"eng"}],"year":"2013","citation":{"short":"C. Kuznik, M. F. S. Oliveira, W. Müller, in: Open SANITAS SystemC Verification Workshop, 2013.","bibtex":"@inproceedings{Kuznik_F. S. Oliveira_Müller_2013, title={SC OVM: An Advanced SystemC Library for OVM-based Verification}, booktitle={Open SANITAS SystemC Verification Workshop}, author={Kuznik, Christoph and F. S. Oliveira, Marcio and Müller, Wolfgang}, year={2013} }","mla":"Kuznik, Christoph, et al. “SC OVM: An Advanced SystemC Library for OVM-Based Verification.” <i>Open SANITAS SystemC Verification Workshop</i>, 2013.","apa":"Kuznik, C., F. S. Oliveira, M., &#38; Müller, W. (2013). SC OVM: An Advanced SystemC Library for OVM-based Verification. <i>Open SANITAS SystemC Verification Workshop</i>.","ieee":"C. Kuznik, M. F. S. Oliveira, and W. Müller, “SC OVM: An Advanced SystemC Library for OVM-based Verification,” 2013.","chicago":"Kuznik, Christoph, Marcio F. S. Oliveira, and Wolfgang Müller. “SC OVM: An Advanced SystemC Library for OVM-Based Verification.” In <i>Open SANITAS SystemC Verification Workshop</i>, 2013.","ama":"Kuznik C, F. S. Oliveira M, Müller W. SC OVM: An Advanced SystemC Library for OVM-based Verification. In: <i>Open SANITAS SystemC Verification Workshop</i>. ; 2013."},"date_updated":"2022-01-06T06:57:08Z","author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"full_name":"F. S. Oliveira, Marcio","last_name":"F. S. Oliveira","first_name":"Marcio"},{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"}],"date_created":"2021-10-07T08:31:07Z","title":"SC OVM: An Advanced SystemC Library for OVM-based Verification"},{"language":[{"iso":"ger"}],"_id":"25615","publication_date":"2013-02-01","department":[{"_id":"672"}],"user_id":"21240","status":"public","publication":"ForschungsForum Paderborn ","type":"newspaper_article","title":" Informationstechnik spart Ressourcen","date_updated":"2022-01-06T06:57:08Z","date_created":"2021-10-07T08:34:47Z","author":[{"full_name":"Engels, Gregor","id":"107","last_name":"Engels","first_name":"Gregor"},{"full_name":"Gerth, Christian","last_name":"Gerth","first_name":"Christian"},{"first_name":"Lisa","last_name":"Kleinjohann","id":"15588","full_name":"Kleinjohann, Lisa"},{"full_name":"Kleinjohann, Bernd","last_name":"Kleinjohann","first_name":"Bernd"},{"last_name":"Müller","full_name":"Müller, Wolfgang","id":"16243","first_name":"Wolfgang"}],"year":"2013","citation":{"apa":"Engels, G., Gerth, C., Kleinjohann, L., Kleinjohann, B., &#38; Müller, W. (2013).  Informationstechnik spart Ressourcen. <i>ForschungsForum Paderborn </i>.","bibtex":"@article{Engels_Gerth_Kleinjohann_Kleinjohann_Müller_2013, title={ Informationstechnik spart Ressourcen}, journal={ForschungsForum Paderborn }, author={Engels, Gregor and Gerth, Christian and Kleinjohann, Lisa and Kleinjohann, Bernd and Müller, Wolfgang}, year={2013} }","short":"G. Engels, C. Gerth, L. Kleinjohann, B. Kleinjohann, W. Müller, ForschungsForum Paderborn  (2013).","mla":"Engels, Gregor, et al. “ Informationstechnik spart Ressourcen.” <i>ForschungsForum Paderborn </i>, 2013.","ama":"Engels G, Gerth C, Kleinjohann L, Kleinjohann B, Müller W.  Informationstechnik spart Ressourcen. <i>ForschungsForum Paderborn </i>. 2013.","chicago":"Engels, Gregor, Christian Gerth, Lisa Kleinjohann, Bernd Kleinjohann, and Wolfgang Müller. “ Informationstechnik spart Ressourcen.” <i>ForschungsForum Paderborn </i>, 2013.","ieee":"G. Engels, C. Gerth, L. Kleinjohann, B. Kleinjohann, and W. Müller, “ Informationstechnik spart Ressourcen,” <i>ForschungsForum Paderborn </i>, 2013."}},{"language":[{"iso":"eng"}],"_id":"25620","user_id":"21240","department":[{"_id":"672"}],"status":"public","type":"conference","publication":"Proceedings of DVCON","title":"Systematic Application of UCIS to Improve the Automation on Verification Closure","date_updated":"2022-01-06T06:57:08Z","date_created":"2021-10-07T08:51:16Z","author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"full_name":"Oliveira, Marcio F.","last_name":"Oliveira","first_name":"Marcio F."},{"last_name":"Defo","full_name":"Defo, Bertrand","first_name":"Bertrand"},{"first_name":"Wolfgang","last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang"}],"year":"2013","citation":{"bibtex":"@inproceedings{Kuznik_Oliveira_Defo_Müller_2013, title={Systematic Application of UCIS to Improve the Automation on Verification Closure}, booktitle={Proceedings of DVCON}, author={Kuznik, Christoph and Oliveira, Marcio F. and Defo, Bertrand and Müller, Wolfgang}, year={2013} }","short":"C. Kuznik, M.F. Oliveira, B. Defo, W. Müller, in: Proceedings of DVCON, 2013.","mla":"Kuznik, Christoph, et al. “Systematic Application of UCIS to Improve the Automation on Verification Closure.” <i>Proceedings of DVCON</i>, 2013.","apa":"Kuznik, C., Oliveira, M. F., Defo, B., &#38; Müller, W. (2013). Systematic Application of UCIS to Improve the Automation on Verification Closure. <i>Proceedings of DVCON</i>.","ama":"Kuznik C, Oliveira MF, Defo B, Müller W. Systematic Application of UCIS to Improve the Automation on Verification Closure. In: <i>Proceedings of DVCON</i>. ; 2013.","chicago":"Kuznik, Christoph, Marcio F. Oliveira, Bertrand Defo, and Wolfgang Müller. “Systematic Application of UCIS to Improve the Automation on Verification Closure.” In <i>Proceedings of DVCON</i>, 2013.","ieee":"C. Kuznik, M. F. Oliveira, B. Defo, and W. Müller, “Systematic Application of UCIS to Improve the Automation on Verification Closure,” 2013."}},{"_id":"25632","department":[{"_id":"672"}],"user_id":"21240","language":[{"iso":"eng"}],"publication":"International Embedded Systems Symposium (IESS) 2013","type":"conference","status":"public","date_updated":"2022-01-06T06:57:08Z","publisher":"Springer","author":[{"first_name":"Kay","full_name":"Klobedanz, Kay","last_name":"Klobedanz"},{"first_name":"Jan","full_name":"Jatzkowski, Jan","last_name":"Jatzkowski"},{"full_name":"Rettberg, Achim","last_name":"Rettberg","first_name":"Achim"},{"id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang"}],"date_created":"2021-10-07T09:46:48Z","title":"Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks","year":"2013","citation":{"ama":"Klobedanz K, Jatzkowski J, Rettberg A, Müller W. Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks. In: <i>International Embedded Systems Symposium (IESS) 2013</i>. Springer; 2013.","ieee":"K. Klobedanz, J. Jatzkowski, A. Rettberg, and W. Müller, “Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks,” 2013.","chicago":"Klobedanz, Kay, Jan Jatzkowski, Achim Rettberg, and Wolfgang Müller. “Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks.” In <i>International Embedded Systems Symposium (IESS) 2013</i>. Springer, 2013.","short":"K. Klobedanz, J. Jatzkowski, A. Rettberg, W. Müller, in: International Embedded Systems Symposium (IESS) 2013, Springer, 2013.","bibtex":"@inproceedings{Klobedanz_Jatzkowski_Rettberg_Müller_2013, title={Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks}, booktitle={International Embedded Systems Symposium (IESS) 2013}, publisher={Springer}, author={Klobedanz, Kay and Jatzkowski, Jan and Rettberg, Achim and Müller, Wolfgang}, year={2013} }","mla":"Klobedanz, Kay, et al. “Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks.” <i>International Embedded Systems Symposium (IESS) 2013</i>, Springer, 2013.","apa":"Klobedanz, K., Jatzkowski, J., Rettberg, A., &#38; Müller, W. (2013). Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks. <i>International Embedded Systems Symposium (IESS) 2013</i>."}},{"_id":"25740","user_id":"21240","department":[{"_id":"672"}],"language":[{"iso":"eng"}],"type":"journal_article","publication":"Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)","status":"public","date_updated":"2022-01-06T06:57:12Z","author":[{"first_name":"Da","full_name":"He, Da","last_name":"He"},{"id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang"}],"date_created":"2021-10-07T09:49:15Z","title":" A heuristic energy-aware approach for hard real-time systems on multi-core platforms","year":"2013","citation":{"chicago":"He, Da, and Wolfgang Müller. “ A Heuristic Energy-Aware Approach for Hard Real-Time Systems on Multi-Core Platforms.” <i>Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)</i>, 2013, 845–57.","ieee":"D. He and W. Müller, “ A heuristic energy-aware approach for hard real-time systems on multi-core platforms,” <i>Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)</i>, pp. 845–857, 2013.","ama":"He D, Müller W.  A heuristic energy-aware approach for hard real-time systems on multi-core platforms. <i>Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)</i>. Published online 2013:845-857.","short":"D. He, W. Müller, Microprocessors and Microsystems - Embedded Hardware Design 37(6-7) (2013) 845–857.","mla":"He, Da, and Wolfgang Müller. “ A Heuristic Energy-Aware Approach for Hard Real-Time Systems on Multi-Core Platforms.” <i>Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)</i>, 2013, pp. 845–57.","bibtex":"@article{He_Müller_2013, title={ A heuristic energy-aware approach for hard real-time systems on multi-core platforms}, journal={Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)}, author={He, Da and Müller, Wolfgang}, year={2013}, pages={845–857} }","apa":"He, D., &#38; Müller, W. (2013).  A heuristic energy-aware approach for hard real-time systems on multi-core platforms. <i>Microprocessors and Microsystems - Embedded Hardware Design 37(6-7)</i>, 845–857."},"page":"845-857"},{"publication":"Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future","type":"book_chapter","status":"public","department":[{"_id":"672"}],"user_id":"21240","_id":"25743","language":[{"iso":"eng"}],"page":"187-356","citation":{"ama":"Anacker H, Dellnitz M, Flaßkamp K, et al. Methods for the Design and Development. In: <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future</i>. Springer-Verlag; 2013:187-356.","ieee":"H. Anacker <i>et al.</i>, “Methods for the Design and Development,” in <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future</i>, Heidelberg: Springer-Verlag, 2013, pp. 187–356.","chicago":"Anacker, Harald, Michael Dellnitz, Kathrin Flaßkamp, Stefan Grösbrink, Philip Hartmann, Christian Heinzemann, Christian Horenkamp, et al. “Methods for the Design and Development.” In <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future</i>, 187–356. Heidelberg: Springer-Verlag, 2013.","mla":"Anacker, Harald, et al. “Methods for the Design and Development.” <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future</i>, Springer-Verlag, 2013, pp. 187–356.","bibtex":"@inbook{Anacker_Dellnitz_Flaßkamp_Grösbrink_Hartmann_Heinzemann_Horenkamp_Kleinjohann_Kleinjohann_Korf_et al._2013, place={Heidelberg}, title={Methods for the Design and Development}, booktitle={Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future}, publisher={Springer-Verlag}, author={Anacker, Harald and Dellnitz, Michael and Flaßkamp, Kathrin and Grösbrink, Stefan and Hartmann, Philip and Heinzemann, Christian and Horenkamp, Christian and Kleinjohann, Lisa and Kleinjohann, Bernd and Korf, Sebastian and et al.}, year={2013}, pages={187–356} }","short":"H. Anacker, M. Dellnitz, K. Flaßkamp, S. Grösbrink, P. Hartmann, C. Heinzemann, C. Horenkamp, L. Kleinjohann, B. Kleinjohann, S. Korf, M. Krüger, W. Müller, S. Ober-Blöbaum, S. Oberthür, M. Porrmann, C. Priesterjahn, W. Radkowski, C. Rasche, J. Rieke, M. Ringkamp, K. Stahl, D. Steenken, J. Stöcklein, R. Timmermann, A. Trächtler, K. Witting, T. Xie, S. Ziegert, in: Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future, Springer-Verlag, Heidelberg, 2013, pp. 187–356.","apa":"Anacker, H., Dellnitz, M., Flaßkamp, K., Grösbrink, S., Hartmann, P., Heinzemann, C., Horenkamp, C., Kleinjohann, L., Kleinjohann, B., Korf, S., Krüger, M., Müller, W., Ober-Blöbaum, S., Oberthür, S., Porrmann, M., Priesterjahn, C., Radkowski, W., Rasche, C., Rieke, J., … Ziegert, S. (2013). Methods for the Design and Development. In <i>Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future</i> (pp. 187–356). Springer-Verlag."},"year":"2013","place":"Heidelberg","author":[{"first_name":"Harald","full_name":"Anacker, Harald","last_name":"Anacker"},{"first_name":"Michael","full_name":"Dellnitz, Michael","last_name":"Dellnitz"},{"full_name":"Flaßkamp, Kathrin","last_name":"Flaßkamp","first_name":"Kathrin"},{"first_name":"Stefan","full_name":"Grösbrink, Stefan","last_name":"Grösbrink"},{"last_name":"Hartmann","full_name":"Hartmann, Philip","first_name":"Philip"},{"full_name":"Heinzemann, Christian","last_name":"Heinzemann","first_name":"Christian"},{"last_name":"Horenkamp","full_name":"Horenkamp, Christian","first_name":"Christian"},{"last_name":"Kleinjohann","id":"15588","full_name":"Kleinjohann, Lisa","first_name":"Lisa"},{"first_name":"Bernd","last_name":"Kleinjohann","full_name":"Kleinjohann, Bernd"},{"first_name":"Sebastian","full_name":"Korf, Sebastian","last_name":"Korf"},{"first_name":"Martin","last_name":"Krüger","full_name":"Krüger, Martin"},{"last_name":"Müller","full_name":"Müller, Wolfgang","id":"16243","first_name":"Wolfgang"},{"full_name":"Ober-Blöbaum, Sina","id":"16494","last_name":"Ober-Blöbaum","first_name":"Sina"},{"first_name":"Simon","full_name":"Oberthür, Simon","id":"383","last_name":"Oberthür"},{"full_name":"Porrmann, Mario","last_name":"Porrmann","first_name":"Mario"},{"last_name":"Priesterjahn","full_name":"Priesterjahn, Claudia","first_name":"Claudia"},{"last_name":"Radkowski","full_name":"Radkowski, W.","first_name":"W."},{"first_name":"Christoph","full_name":"Rasche, Christoph","last_name":"Rasche"},{"full_name":"Rieke, Jan","last_name":"Rieke","first_name":"Jan"},{"first_name":"Maik","full_name":"Ringkamp, Maik","last_name":"Ringkamp"},{"first_name":"Katharina","last_name":"Stahl","full_name":"Stahl, Katharina"},{"first_name":"Dominik","last_name":"Steenken","full_name":"Steenken, Dominik"},{"first_name":"Jörg","full_name":"Stöcklein, Jörg","last_name":"Stöcklein"},{"full_name":"Timmermann, Robert","last_name":"Timmermann","first_name":"Robert"},{"id":"552","full_name":"Trächtler, Ansgar","last_name":"Trächtler","first_name":"Ansgar"},{"last_name":"Witting","full_name":"Witting, Katrin","first_name":"Katrin"},{"full_name":"Xie, Tao","last_name":"Xie","first_name":"Tao"},{"first_name":"Steffen","last_name":"Ziegert","full_name":"Ziegert, Steffen"}],"date_created":"2021-10-07T10:07:43Z","publisher":"Springer-Verlag","date_updated":"2022-01-06T06:57:12Z","title":"Methods for the Design and Development"},{"abstract":[{"text":"Faced with increasing demands on energy efficiency, current electronic systems operate according to complex power management schemes including more and more fine-grained voltage frequency scaling and power shutdown scenarios. Consequently, validation of the power design intent should begin as early as possible at electronic system-level (ESL) together with first executable system specifications for integrity tests. However, today's system-level design methodologies usually focus on the abstraction of digital logic and time, so that typical low-power aspects cannot be considered so far. In this paper, we present a high-level modeling approach on top of the SystemC/TLM standard to simulate power distribution and voltage based implications in a \"loosely-timed\" functional execution context. The approach reuses legacy TLM models and prevents the need for detailed lock-step process synchronization in contrast to existing methods. A case study derived from an open source low-power design demonstrates the efficiency of our approach in terms of simulation performance and testability.","lang":"eng"}],"status":"public","type":"conference","keyword":["Time-varying systems","Time-domain analysis","Synchronization","Context modeling","Clocks","Semantics","Standards"],"language":[{"iso":"eng"}],"_id":"36919","user_id":"5786","department":[{"_id":"672"}],"place":"Karlsruhe","year":"2013","citation":{"ieee":"F. Mischkalla and W. Müller, “Efficient Power-Intent Validation Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach,” presented at the 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013, doi: <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Efficient Power-Intent Validation Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach.” Karlsruhe: IEEE, 2013. <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">https://doi.org/10.1109/PATMOS.2013.6662171</a>.","ama":"Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>","apa":"Mischkalla, F., &#38; Müller, W. (2013). <i>Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">https://doi.org/10.1109/PATMOS.2013.6662171</a>","bibtex":"@inproceedings{Mischkalla_Müller_2013, place={Karlsruhe}, title={Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach}, DOI={<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>}, publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013} }","mla":"Mischkalla, Fabian, and Wolfgang Müller. <i>Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. IEEE, 2013, doi:<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>.","short":"F. Mischkalla, W. Müller, in: IEEE, Karlsruhe, 2013."},"publication_identifier":{"eisbn":["978-1-4799-1170-7"]},"title":"Efficient Power-Intent Validation Using \"Loosely-Timed\" Simulation Models: A Non-Invasive Approach","conference":{"name":"23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)"},"doi":"10.1109/PATMOS.2013.6662171","date_updated":"2023-01-16T12:08:17Z","publisher":"IEEE","date_created":"2023-01-16T12:08:03Z","author":[{"last_name":"Mischkalla","full_name":"Mischkalla, Fabian","first_name":"Fabian"},{"first_name":"Wolfgang","id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller"}]},{"department":[{"_id":"672"}],"user_id":"5786","_id":"36920","language":[{"iso":"eng"}],"keyword":["Dynamic Power Management","Dynamic Voltage and Frequency Scaling","Hard Real-Time","Multi-core Processor"],"publication":"Proceedings of the International Conference on Applied Computing (AC)","type":"conference","status":"public","editor":[{"first_name":"Hans","full_name":"Weghorn, Hans","last_name":"Weghorn"}],"abstract":[{"text":"In the electronic system development, energy consumption is clearly becoming one of the most important design concerns. From the system level point of view, Dynamic Power Management (DPM) and Dynamic Voltage and Frequency Scaling (DVFS) are two mostly applied techniques to adjust the tradeoff between the performance and power dissipation at runtime. In this paper, we study the problem of combined application of both techniques with regard to hard real-time systems running on cluster-based multi-core processors. To optimize the processor energy consumption, a heuristic based on simulated annealing with efficient termination criterion is proposed. The experiment results show that the proposed algorithm outperforms the existing approaches in terms of the energy reduction. ","lang":"eng"}],"date_created":"2023-01-16T12:12:58Z","author":[{"first_name":"Da","full_name":"He, Da","last_name":"He"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller"}],"date_updated":"2023-01-16T12:15:44Z","title":"An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors","publication_identifier":{"isbn":["978-989-8533-20-3 "]},"citation":{"chicago":"He, Da, and Wolfgang Müller. “An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors.” In <i>Proceedings of the International Conference on Applied Computing (AC)</i>, edited by Hans Weghorn. Fort Worth, Texas, USA, 2013.","ieee":"D. He and W. Müller, “An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors,” in <i>Proceedings of the International Conference on Applied Computing (AC)</i>, 2013.","ama":"He D, Müller W. An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors. 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He, W. Müller, in: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012), IEEE Xplore, 2012.","apa":"He, D., &#38; Müller, W. (2012). Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. <i>Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012)</i>.","chicago":"He, Da, and Wolfgang Müller. “Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms.” In <i>Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012)</i>. IEEE Xplore, 2012.","ieee":"D. He and W. Müller, “Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms,” 2012.","ama":"He D, Müller W. Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. In: <i>Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012)</i>. IEEE Xplore; 2012."},"date_updated":"2022-01-06T06:57:15Z","publisher":"IEEE Xplore","author":[{"full_name":"He, Da","last_name":"He","first_name":"Da"},{"id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang"}],"date_created":"2021-10-11T08:43:05Z","title":"Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms"},{"year":"2012","citation":{"bibtex":"@inproceedings{Radke_Rülke_Oliveira_Kuznik_Müller_Ecker_Esen_Hufnagel_Bannow_Oetjens_et al._2012, title={Compilation of Methodologies to Speed up the Verification Process at System Level}, booktitle={edaWorkshop 12}, author={Radke, Stephan and Rülke, Steffen and Oliveira, Marcio F. and Kuznik, Christoph and Müller, Wolfgang and Ecker, Wolfgang and Esen, Volkan and Hufnagel, Simon and Bannow, Nico and Oetjens, Jan-Hendrik and et al.}, year={2012} }","short":"S. Radke, S. Rülke, M.F. Oliveira, C. Kuznik, W. Müller, W. Ecker, V. Esen, S. Hufnagel, N. Bannow, J.-H. Oetjens, H. Brazdrum, P. Janssen, H.M. Le, D. Große, F. Haedicke, R. Drechsler, G. Koch, A. Burger, O. Bringmann, W. Rosenstiel, R. Görgen, in: EdaWorkshop 12, 2012.","mla":"Radke, Stephan, et al. “Compilation of Methodologies to Speed up the Verification Process at System Level.” <i>EdaWorkshop 12</i>, 2012.","apa":"Radke, S., Rülke, S., Oliveira, M. F., Kuznik, C., Müller, W., Ecker, W., Esen, V., Hufnagel, S., Bannow, N., Oetjens, J.-H., Brazdrum, H., Janssen, P., Le, H. M., Große, D., Haedicke, F., Drechsler, R., Koch, G., Burger, A., Bringmann, O., … Görgen, R. (2012). Compilation of Methodologies to Speed up the Verification Process at System Level. <i>EdaWorkshop 12</i>.","ieee":"S. Radke <i>et al.</i>, “Compilation of Methodologies to Speed up the Verification Process at System Level,” 2012.","chicago":"Radke, Stephan, Steffen Rülke, Marcio F. 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In: <i>EdaWorkshop 12</i>. ; 2012."},"title":"Compilation of Methodologies to Speed up the Verification Process at System Level","main_file_link":[{"url":"http://www.vde-verlag.de/proceedings-de/563428010.html"}],"date_updated":"2022-01-06T06:57:15Z","date_created":"2021-10-11T08:54:53Z","author":[{"first_name":"Stephan","full_name":"Radke, Stephan","last_name":"Radke"},{"full_name":"Rülke, Steffen","last_name":"Rülke","first_name":"Steffen"},{"first_name":"Marcio F.","full_name":"Oliveira, Marcio F.","last_name":"Oliveira"},{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","id":"16243","last_name":"Müller"},{"last_name":"Ecker","full_name":"Ecker, Wolfgang","first_name":"Wolfgang"},{"first_name":"Volkan","full_name":"Esen, Volkan","last_name":"Esen"},{"first_name":"Simon","last_name":"Hufnagel","full_name":"Hufnagel, Simon"},{"full_name":"Bannow, Nico","last_name":"Bannow","first_name":"Nico"},{"first_name":"Jan-Hendrik","last_name":"Oetjens","full_name":"Oetjens, Jan-Hendrik"},{"last_name":"Brazdrum","full_name":"Brazdrum, Helmut","first_name":"Helmut"},{"full_name":"Janssen, Peter","last_name":"Janssen","first_name":"Peter"},{"last_name":"Le","full_name":"Le, Hoang M.","first_name":"Hoang M."},{"first_name":"Daniel","full_name":"Große, Daniel","last_name":"Große"},{"last_name":"Haedicke","full_name":"Haedicke, Finn","first_name":"Finn"},{"full_name":"Drechsler, Rolf","last_name":"Drechsler","first_name":"Rolf"},{"last_name":"Koch","full_name":"Koch, Gernot","first_name":"Gernot"},{"full_name":"Burger, Andreas","last_name":"Burger","first_name":"Andreas"},{"last_name":"Bringmann","full_name":"Bringmann, Oliver","first_name":"Oliver"},{"full_name":"Rosenstiel, Wolfgang","last_name":"Rosenstiel","first_name":"Wolfgang"},{"first_name":"Ralph","full_name":"Görgen, Ralph","last_name":"Görgen"}],"status":"public","publication":"edaWorkshop 12","type":"conference","language":[{"iso":"eng"}],"_id":"26024","department":[{"_id":"672"}],"user_id":"21240"},{"year":"2012","citation":{"ama":"He D, Müller W. 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Pravadelli, and Sara Vinco. “MOUSSE: Scaling MOdelling and Verification to Complex HeterogeneoUS Embedded Systems Evolution.” In <i>Design, Automation and Test in Europe (DATE 2012)</i>. Dresden, 2012.","ama":"Becker M, Gnokam Defo GB, Müller W, Fummi F, Pravadelli G, Vinco S. MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. 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MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. <i>Design, Automation and Test in Europe (DATE 2012)</i>."},"title":"MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution","date_updated":"2022-01-06T06:57:16Z","author":[{"full_name":"Becker, Markus","last_name":"Becker","first_name":"Markus"},{"first_name":"Gilles Bertrand","last_name":"Gnokam Defo","full_name":"Gnokam Defo, Gilles Bertrand"},{"last_name":"Müller","id":"16243","full_name":"Müller, Wolfgang","first_name":"Wolfgang"},{"full_name":"Fummi, F.","last_name":"Fummi","first_name":"F."},{"full_name":"Pravadelli, G.","last_name":"Pravadelli","first_name":"G."},{"last_name":"Vinco","full_name":"Vinco, Sara","first_name":"Sara"}],"date_created":"2021-10-12T10:06:15Z"}]